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REG103GA-5

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-6. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)reg103ga-5factory-2.0.0extractor-text
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Contents

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REG103GA-5

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6

REG103GA-5 from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input; specified 2.1V to 15V operating range (absolute maximum 16V), with a 0.1µF low-ESR input capacitor recommended.
2 VOUT power_out Regulated 5.0V output with ±2% max accuracy, up to 500mA with foldback current limit; no output capacitor required for stability.
3 GND power_in Ground pin; ground pin current is typically 1mA at 500mA load and 0.5µA when not enabled.
4 NR/Adjust passive Noise-reduction capacitor pin on fixed-voltage models such as the 5V REG103GA-5 (optional 0.01µF CNR to ground); absolute maximum voltage −0.3V to 6.0V.
5 ENABLE input Active-high enable compatible with TTL-CMOS levels, with below 0.5V max turning the regulator off, and it may be tied to VIN when unused (absolute maximum −0.3V to VIN).
6 TAB (GND) power_in Package tab is electrically connected to ground and is not intended to carry current; it is used as a heat-sink pad.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-223-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage accuracy -2 0.5 2 % 3
Output voltage accuracy over temperature -2.8 2.8 % TJ = -40°C to +85°C 3
Output voltage vs line and load -2.5 0.5 2.5 % IOUT = 10mA to 500mA, VIN = (VOUT + 0.7V) to 15V 3
Output voltage vs line and load over temperature -3.5 3.5 % TJ = -40°C to +85°C, VIN = (VOUT + 0.9V) to 15V 3
DC dropout voltage (5V model) VDROP 160 250 mV For 5V model, IOUT = 500mA 3
DC dropout voltage (5V model) over temperature VDROP 280 mV For 5V models, IOUT = 500mA, TJ = -40°C to +85°C 3
DC dropout voltage at low load VDROP 3 25 mV IOUT = 10mA 3
Current limit ICL 550 700 950 mA 3
Current limit over temperature ICL 500 1000 mA TJ = -40°C to +85°C 3
ENABLE voltage HIGH (output enabled) VENABLE 2 V Output enabled; printed maximum is VIN 3
ENABLE voltage LOW (output disabled) VENABLE -0.2 0.5 V Output disabled 3
ENABLE input current HIGH (output enabled) IENABLE 1 100 nA VENABLE = 2V to VIN, VIN = 2.1V to 6.5 3
ENABLE input current LOW (output disabled) IENABLE 2 100 nA VENABLE = 0V to 0.5V 3
Ground pin current IGND 0.5 0.7 mA IOUT = 10mA 3
Ground pin current at full load IGND 1 1.3 mA IOUT = 500mA 3
Operating input voltage range VIN 2.1 15 V 3
Specified input voltage range VIN 15 V VIN > 2.7V; minimum printed as VOUT + 0.7 V (not evaluated) 3
Specified input voltage range over temperature VIN 15 V TJ = -40°C to +85°C, VIN > 2.9V; minimum printed as VOUT + 0.9 V (not evaluated) 3
Specified junction temperature range TJ -40 85 °C 3
Operating temperature range -55 125 °C 2
Storage temperature range -65 150 °C 2
Junction temperature TJ -55 150 °C 2
Supply input voltage VIN -0.3 16 V 2
Enable input voltage VEN -0.3 V Maximum printed as VIN 2
NR pin voltage VNR -0.3 6 V 2
Lead temperature (soldering) 240 °C Soldering, 3s, SOT package 2
ESD rating HBM (VOUT to GND) 1.5 kV HBM, VOUT to GND 2
ESD rating HBM (all other pins) 2 kV HBM, all other pins 2
ESD rating CDM 500 V CDM 2
Output voltage (REG103-5) VOUT 5 V REG103-5 3
Ripple rejection 65 dB f = 120Hz 3
Output voltage noise without CNR Vn 30 µVrms/V • VOUT f = 10Hz to 100kHz, CNR = 0, COUT = 0 3
Output voltage noise with CNR Vn 10 µVrms/V • VOUT f = 10Hz to 100kHz, CNR = 0.01µF, COUT = 10µF 3
Output voltage temperature drift dVOUT/dT 70 ppm/°C TJ = -40°C to +85°C 3
Ground pin current, ENABLE pin LOW IGND 0.5 µA VENABLE ≤ 0.5V 3
Output disable time 50 µs 3
Output enable soft start time 1.5 ms 3
Thermal shutdown junction temperature 150 °C Shutdown 3
Thermal reset junction temperature 130 °C Reset from shutdown 3
Thermal resistance junction-to-case (SOT223-5) θJC 15 °C/W SOT223-5 surface-mount, junction-to-case 3

CAD (KiCad official)

  • Symbol: REG103GA-5
  • Footprint: Package_TO_SOT_SMD:SOT-223-6
  • 3D model: SOT-223-6 (KiCad packages3D, STEP)
  • 3D model files: reg103ga-5-etched.step / reg103ga-5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); reg103ga-5.step / reg103ga-5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 a25e65ed50b9b378, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF