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RD3L150SNTL1
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ROHM Semicon MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RD3L150SNTL1
ROHM Semicon · MOSFETs · TO-252
RD3L150SNTL1 from ROHM Semicon, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal with ESD protection diode to source; VGSS maximum ±20 V and threshold VGS(th) 1.0 to 3.0 V at VDS = 10 V, ID = 1 mA. |
| 2 | Drain | passive | Drain terminal (also the tab) with VDSS of 60 V and continuous drain current ID of ±15 A, pulsed ±30 A. |
| 3 | Source | passive | Source terminal with body diode to drain, rated IS of 15 A continuous and 30 A pulsed. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain - Source voltage | VDSS | 60 | V | 1 | |||
| Continuous drain current | ID | -15 | 15 | A | Limited only by maximum temperature allowed (*1) | 1 | |
| Pulsed drain current | IDP | -30 | 30 | A | Pw ≦ 10μs, duty cycle ≦ 1% (*2) | 1 | |
| Gate - Source voltage | VGSS | -20 | 20 | V | 1 | ||
| Power dissipation | PD | 20 | W | Tc = 25℃ (*3) | 1 | ||
| Junction temperature | Tj | 150 | ℃ | 1 | |||
| Operating junction and storage temperature range | Tstg | -55 | 150 | ℃ | 1 | ||
| Thermal resistance, junction - case | RthJC | 6.25 | ℃/W | Tc = 25℃ (*3) | 2 | ||
| Drain - Source breakdown voltage | V(BR)DSS | 60 | V | VGS = 0V, ID = 1mA | 2 | ||
| Zero gate voltage drain current | IDSS | 1 | μA | VDS = 60V, VGS = 0V | 2 | ||
| Gate - Source leakage current | IGSS | -10 | 10 | μA | VGS = ±20V, VDS = 0V | 2 | |
| Gate threshold voltage | VGS(th) | 1 | 3 | V | VDS = 10V, ID = 1mA | 2 | |
| Static drain - source on - state resistance | RDS(on) | 28 | 40 | mΩ | VGS = 10V, ID = 15A, pulsed (*4) | 2 | |
| Static drain - source on - state resistance | RDS(on) | 33 | 47 | mΩ | VGS = 4.5V, ID = 15A, pulsed (*4) | 2 | |
| Static drain - source on - state resistance | RDS(on) | 36 | 51 | mΩ | VGS = 4.0V, ID = 15A, pulsed (*4) | 2 | |
| Forward Transfer Admittance | /Yfs/ | 7 | S | VDS = 10V, ID = 15A, pulsed (*4) | 2 | ||
| Breakdown voltage temperature coefficient | ΔV(BR)DSS/ΔTj | 63.7 | mV/℃ | ID = 1mA, referenced to 25℃ | 2 | ||
| Gate threshold voltage temperature coefficient | ΔVGS(th)/ΔTj | -4.4 | mV/℃ | ID = 1mA, referenced to 25℃ | 2 | ||
| Gate resistance | RG | 4.2 | Ω | f = 1MHz, open drain | 2 | ||
| Input capacitance | Ciss | 930 | pF | VGS = 0V | 3 | ||
| Output capacitance | Coss | 200 | pF | VDS = 10V | 3 | ||
| Reverse transfer capacitance | Crss | 80 | pF | f = 1MHz | 3 | ||
| Turn - on delay time | td(on) | 10 | ns | VDD ⋍ 30V, VGS = 10V | 3 | ||
| Rise time | tr | 30 | ns | ID = 7.5A | 3 | ||
| Turn - off delay time | td(off) | 45 | ns | RL ⋍ 4.0Ω | 3 | ||
| Fall time | tf | 15 | ns | RG = 10Ω | 3 | ||
| Total gate charge | Qg | 18 | nC | VDD ⋍ 30V, ID = 15A, VGS = 10V | 3 | ||
| Gate - Source charge | Qgs | 3.2 | nC | 3 | |||
| Gate - Drain charge | Qgd | 3.8 | nC | 3 | |||
| Continuous forward current | IS | 15 | A | Ta = 25℃ (*1) | 3 | ||
| Pulse forward current | ISP | 30 | A | 3 | |||
| Forward voltage | VSD | 1.2 | V | VGS = 0V, IS = 15A, pulsed (*4) | 3 |
CAD (KiCad official)
- Symbol:
RD3L150SNTL1 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
rd3l150sntl1-etched.step/rd3l150sntl1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rd3l150sntl1.step/rd3l150sntl1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (15 pp, sha256
1ac09f89d8dd7a71, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RD3L150SNTL1
**ROHM Semicon** · MOSFETs · TO-252
RD3L150SNTL1 from ROHM Semicon, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal with ESD protection diode to source; VGSS maximum ±20 V and threshold VGS(th) 1.0 to 3.0 V at VDS = 10 V, ID = 1 mA. |
| 2 | Drain | passive | Drain terminal (also the tab) with VDSS of 60 V and continuous drain current ID of ±15 A, pulsed ±30 A. |
| 3 | Source | passive | Source terminal with body diode to drain, rated IS of 15 A continuous and 30 A pulsed. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain - Source voltage | VDSS | | | 60 | V | | 1 |
| Continuous drain current | ID | -15 | | 15 | A | Limited only by maximum temperature allowed (*1) | 1 |
| Pulsed drain current | IDP | -30 | | 30 | A | Pw ≦ 10μs, duty cycle ≦ 1% (*2) | 1 |
| Gate - Source voltage | VGSS | -20 | | 20 | V | | 1 |
| Power dissipation | PD | | | 20 | W | Tc = 25℃ (*3) | 1 |
| Junction temperature | Tj | | | 150 | ℃ | | 1 |
| Operating junction and storage temperature range | Tstg | -55 | | 150 | ℃ | | 1 |
| Thermal resistance, junction - case | RthJC | | | 6.25 | ℃/W | Tc = 25℃ (*3) | 2 |
| Drain - Source breakdown voltage | V(BR)DSS | 60 | | | V | VGS = 0V, ID = 1mA | 2 |
| Zero gate voltage drain current | IDSS | | | 1 | μA | VDS = 60V, VGS = 0V | 2 |
| Gate - Source leakage current | IGSS | -10 | | 10 | μA | VGS = ±20V, VDS = 0V | 2 |
| Gate threshold voltage | VGS(th) | 1 | | 3 | V | VDS = 10V, ID = 1mA | 2 |
| Static drain - source on - state resistance | RDS(on) | | 28 | 40 | mΩ | VGS = 10V, ID = 15A, pulsed (*4) | 2 |
| Static drain - source on - state resistance | RDS(on) | | 33 | 47 | mΩ | VGS = 4.5V, ID = 15A, pulsed (*4) | 2 |
| Static drain - source on - state resistance | RDS(on) | | 36 | 51 | mΩ | VGS = 4.0V, ID = 15A, pulsed (*4) | 2 |
| Forward Transfer Admittance | /Yfs/ | 7 | | | S | VDS = 10V, ID = 15A, pulsed (*4) | 2 |
| Breakdown voltage temperature coefficient | ΔV(BR)DSS/ΔTj | | 63.7 | | mV/℃ | ID = 1mA, referenced to 25℃ | 2 |
| Gate threshold voltage temperature coefficient | ΔVGS(th)/ΔTj | | -4.4 | | mV/℃ | ID = 1mA, referenced to 25℃ | 2 |
| Gate resistance | RG | | 4.2 | | Ω | f = 1MHz, open drain | 2 |
| Input capacitance | Ciss | | 930 | | pF | VGS = 0V | 3 |
| Output capacitance | Coss | | 200 | | pF | VDS = 10V | 3 |
| Reverse transfer capacitance | Crss | | 80 | | pF | f = 1MHz | 3 |
| Turn - on delay time | td(on) | | 10 | | ns | VDD ⋍ 30V, VGS = 10V | 3 |
| Rise time | tr | | 30 | | ns | ID = 7.5A | 3 |
| Turn - off delay time | td(off) | | 45 | | ns | RL ⋍ 4.0Ω | 3 |
| Fall time | tf | | 15 | | ns | RG = 10Ω | 3 |
| Total gate charge | Qg | | 18 | | nC | VDD ⋍ 30V, ID = 15A, VGS = 10V | 3 |
| Gate - Source charge | Qgs | | 3.2 | | nC | | 3 |
| Gate - Drain charge | Qgd | | 3.8 | | nC | | 3 |
| Continuous forward current | IS | | | 15 | A | Ta = 25℃ (*1) | 3 |
| Pulse forward current | ISP | | | 30 | A | | 3 |
| Forward voltage | VSD | | | 1.2 | V | VGS = 0V, IS = 15A, pulsed (*4) | 3 |
## CAD (KiCad official)
- Symbol: `RD3L150SNTL1`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `rd3l150sntl1-etched.step` / `rd3l150sntl1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rd3l150sntl1.step` / `rd3l150sntl1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ROHM Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603006158789619712) (15 pp, sha256 `1ac09f89d8dd7a71`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rd3l150sntl1-datasheet.pdf)