component
RCLAMP0504FATCT-N
Public Made by Adomby adom
BORN ESD And Surge Protection (TVS/ESD), SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RCLAMP0504FATCT-N
BORN · ESD And Surge Protection (TVS/ESD) · SOT-363
RCLAMP0504FATCT-N from BORN, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 2 | GND | power_in | Ground reference for the ESD protection diodes; the datasheet shows GND in the schematic but does not state its pin number explicitly. |
| 3 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 4 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 5 | Vcc | power_in | Supply reference pin of the ESD protection diode array; the datasheet shows Vcc in the schematic but does not state its pin number explicitly. |
| 6 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BORN |
| Package | SOT-363 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power | PPP | 60 | Watts | tp=8/20μs | 2 | ||
| Peak Pulse Current | Ipp | 3.5 | A | tp=8/20μs (note1) | 2 | ||
| ESD per IEC 61000-4-2 (Air) | VESD | 20 | kV | IEC 61000-4-2 (Air) | 2 | ||
| ESD per IEC 61000-4-2 (Contact) | VESD | 15 | kV | IEC 61000-4-2 (Contact) | 2 | ||
| Lead Soldering Temperature | TL | 260 | ℃ | 10 seconds | 2 | ||
| Junction Temperature | TJ | -55 | 125 | ℃ | 2 | ||
| Storage Temperature | Tstg | -55 | 125 | ℃ | 2 | ||
| Reverse Stand-Off Voltage | VRWM | 5 | V | 2 | |||
| Reverse Breakdown Voltage | VBR | 6 | V | IT=1mA | 2 | ||
| Reverse Leakage Current | IR | 50 | 500 | nA | VRWM=5V, T=25℃ | 2 | |
| Peak Pulse Current | IPP | 3 | A | tp=8/20μs | 2 | ||
| Clamping Voltage | VC | 15 | 18 | V | IPP=3.5A, tp=8/20μs | 2 | |
| Junction Capacitance IO to IO | Cj | 0.2 | 0.25 | pF | VR=0V, f=1MHz, IO to IO | 2 | |
| Junction Capacitance IO to GND | Cj | 0.35 | 0.5 | pF | VR=0V, f=1MHz, IO to GND | 2 |
CAD (KiCad official)
- Symbol:
RCLAMP0504FATCT-N - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
rclamp0504fatct-n-etched.step/rclamp0504fatct-n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rclamp0504fatct-n.step/rclamp0504fatct-n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BORN datasheet (4 pp, sha256
912effcbac7665f9, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RCLAMP0504FATCT-N
**BORN** · ESD And Surge Protection (TVS/ESD) · SOT-363
RCLAMP0504FATCT-N from BORN, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 2 | GND | power_in | Ground reference for the ESD protection diodes; the datasheet shows GND in the schematic but does not state its pin number explicitly. |
| 3 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 4 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
| 5 | Vcc | power_in | Supply reference pin of the ESD protection diode array; the datasheet shows Vcc in the schematic but does not state its pin number explicitly. |
| 6 | I/O | bidirectional | Protected data/power line I/O of the ESD diode array, rated for 5.0 V reverse stand-off voltage (VRWM) with 6 V minimum reverse breakdown (VBR at 1 mA). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BORN |
| Package | SOT-363 |
| Category | Circuit Protection |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power | PPP | | | 60 | Watts | tp=8/20μs | 2 |
| Peak Pulse Current | Ipp | | | 3.5 | A | tp=8/20μs (note1) | 2 |
| ESD per IEC 61000-4-2 (Air) | VESD | | | 20 | kV | IEC 61000-4-2 (Air) | 2 |
| ESD per IEC 61000-4-2 (Contact) | VESD | | | 15 | kV | IEC 61000-4-2 (Contact) | 2 |
| Lead Soldering Temperature | TL | | | 260 | ℃ | 10 seconds | 2 |
| Junction Temperature | TJ | -55 | | 125 | ℃ | | 2 |
| Storage Temperature | Tstg | -55 | | 125 | ℃ | | 2 |
| Reverse Stand-Off Voltage | VRWM | | | 5 | V | | 2 |
| Reverse Breakdown Voltage | VBR | 6 | | | V | IT=1mA | 2 |
| Reverse Leakage Current | IR | | 50 | 500 | nA | VRWM=5V, T=25℃ | 2 |
| Peak Pulse Current | IPP | 3 | | | A | tp=8/20μs | 2 |
| Clamping Voltage | VC | | 15 | 18 | V | IPP=3.5A, tp=8/20μs | 2 |
| Junction Capacitance IO to IO | Cj | | 0.2 | 0.25 | pF | VR=0V, f=1MHz, IO to IO | 2 |
| Junction Capacitance IO to GND | Cj | | 0.35 | 0.5 | pF | VR=0V, f=1MHz, IO to GND | 2 |
## CAD (KiCad official)
- Symbol: `RCLAMP0504FATCT-N`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `rclamp0504fatct-n-etched.step` / `rclamp0504fatct-n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rclamp0504fatct-n.step` / `rclamp0504fatct-n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [BORN datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590173279052075008) (4 pp, sha256 `912effcbac7665f9`, retrieved 2026-10-14, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rclamp0504fatct-n-datasheet.pdf)