# RCL061210R0FKEA

**Vishay Intertech** · Chip Resistor - Surface Mount · 0612

RCL061210R0FKEA from Vishay Intertech, in a 0612. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Terminal 1 of an unpolarised resistor; either orientation. |
| 2 | 2 | passive | Terminal 2 of an unpolarised resistor; either orientation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | 0612 |
| Category | Resistors |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistance tolerance |  | -1 |  | 1 | % | 1 Ω to 1 MΩ; E24; E96 | 2 |
| Temperature coefficient of resistance | TCR | -100 |  | 100 | ppm/K | 1 Ω to 1 MΩ; E24; E96 | 2 |
| Operating voltage, Umax (RCL0612) | Umax |  |  | 200 | V | AC RMS / DC | 1 |
| Permissible voltage against ambient (insulation) (RCL0612) | Uins |  |  | 100 | V | 1 min | 1 |
| Permissible film temperature | ϑF max. |  |  | 155 | °C |  | 1 |
| Operating temperature range |  | -55 |  | 155 | °C |  | 1 |
| Rated dissipation (RCL0612) | P70 |  |  | 1 | W | 70 °C; requires dedicated mounting conditions (note 2) | 1 |
| Max. resistance change at P70, /ΔR/R/ | /ΔR/R/ |  |  | 1 | % | P70; after 1000 h; resistance range | 1 |
| Max. resistance change at P70, /ΔR/R/ | /ΔR/R/ |  |  | 2 | % | P70; after 8000 h; resistance range | 1 |
| Resistance (nominal value, MPN 10R0) | R |  | 10 |  | Ω |  | 2 |

## CAD (KiCad official)

- Symbol: `RCL061210R0FKEA`
- Footprint: `Resistor_SMD:R_0612_1632Metric`
- 3D model: 0612 (KiCad packages3D, STEP)
- 3D model files: `rcl061210r0fkea-etched.step` / `rcl061210r0fkea-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rcl061210r0fkea.step` / `rcl061210r0fkea.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590312642662871040) (9 pp, sha256 `98d5d0745df11c2f`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `two-terminal convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rcl061210r0fkea-datasheet.pdf)