main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 28d ago
viewers rc4459: viewers · Ray 28d ago
package.json Publish 0.1.0 · Ray 28d ago
page.json Set visibility: public · Ray 28d ago
rc4459-etched.glb rc4459: factory component page (tier=lcsc) · Ray 28d ago
rc4459-etched.step rc4459: factory component page (tier=lcsc) · Ray 28d ago
rc4459-hero.glb rc4459: hero GLB from the etched model (keeps the MPN mark) · Ray 28d ago
rc4459-hero.overlay.json Publish 0.1.0 · Ray 28d ago
rc4459.glb Publish 0.1.0 · Ray 28d ago
rc4459.kicad_mod Publish 0.1.0 · Ray 28d ago
rc4459.kicad_sym Publish 0.1.0 · Ray 28d ago
rc4459.lbr Publish 0.1.0 · Ray 28d ago
rc4459.step Publish 0.1.0 · Ray 28d ago
README.md Publish 0.1.0 · Ray 28d ago

RC4459

RealChip · MOSFETs · SOP-8

RC4459 from RealChip, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the P-channel MOSFET; one of three source pins (1, 2, 3) on the SOP-8 package.
2 Source passive Source terminal of the P-channel MOSFET; one of three source pins (1, 2, 3) on the SOP-8 package.
3 Source passive Source terminal of the P-channel MOSFET; one of three source pins (1, 2, 3) on the SOP-8 package.
4 Gate input Gate of the P-channel MOSFET; the gate-source voltage is rated VGS = ±20 V.
5 Drain passive Drain terminal of the P-channel MOSFET; one of four drain pins (5, 6, 7, 8), rated VDS = -30 V.
6 Drain passive Drain terminal of the P-channel MOSFET; one of four drain pins (5, 6, 7, 8), rated VDS = -30 V.
7 Drain passive Drain terminal of the P-channel MOSFET; one of four drain pins (5, 6, 7, 8), rated VDS = -30 V.
8 Drain passive Drain terminal of the P-channel MOSFET; one of four drain pins (5, 6, 7, 8), rated VDS = -30 V.

Key specifications

Parameter Value
Manufacturer RealChip
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

CAD (KiCad official)

  • Symbol: RC4459
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: rc4459-etched.step / rc4459-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rc4459.step / rc4459.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RealChip datasheet (5 pp, sha256 5a10514cd1ab3c15, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF