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Contents

README

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R7FA4M2AB3CFM#AA0

RENESAS · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

R7FA4M2AB3CFM#AA0 from RENESAS, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P400 bidirectional General I/O port 400 (5 V tolerant) with IRQ0, SCK4/SCL0_A/AUDIO_CLK, GTIOC6A/AGTIO1 functions.
2 P401 bidirectional General I/O port 401 (5 V tolerant) with IRQ5-DS, CTS4_RTS4/SS4/SDA0_A/CTX0, GTETRGA/GTIOC6B functions.
3 P402 bidirectional General I/O port 402 with CACREF, IRQ4-DS, CTS4/CRX0/AUDIO_CLK, AGTIO0-3/RTCIC0 functions.
4 VBATT power_in Battery backup power pin.
5 VCL passive Connect to VSS through a smoothing capacitor placed close to the pin to stabilize the internal power supply.
6 XCIN input Sub-clock oscillator pin; connect a crystal resonator between XCIN and XCOUT.
7 XCOUT output Sub-clock oscillator pin; connect a crystal resonator between XCIN and XCOUT.
8 VSS power_in Ground pin; connect to the system power supply (0 V).
9 P213/XTAL bidirectional General I/O port 213 or main clock crystal resonator output XTAL, with IRQ2, TXD1/MOSI1/SDA1, GTETRGC/GTIOC0A/AGTEE2 functions.
10 P212/EXTAL bidirectional General I/O port 212 or main clock crystal pin/external clock input EXTAL, with IRQ3, RXD1/MISO1/SCL1, GTETRGD/GTIOC0B/AGTEE1 functions.
11 VCC power_in Power supply pin; connect to the system power supply and to VSS by a 0.1-µF capacitor placed close to the pin.
12 P411 bidirectional General I/O port 411 (5 V tolerant) with IRQ4, TXD0/MOSI0/SDA0/CTS3_RTS3/SS3/SD0DAT0_A, GTOVUP/AGTOA1, TS07 functions.
13 P410 bidirectional General I/O port 410 (5 V tolerant) with IRQ5, RXD0/MISO0/SCL0/SCK3/SD0DAT1_A, GTOVLO/AGTOB1, TS06 functions.
14 P409 bidirectional General I/O port 409 (5 V tolerant) with IRQ6, TXD3/MOSI3/SDA3/USB_EXICEN, GTOWUP/AGTOA2, TS05 functions.
15 P408 bidirectional General I/O port 408 (5 V tolerant) with IRQ7, CTS4/RXD3/MISO3/SCL3/SCL0_B/USB_ID, GTOWLO/GTIOC6B/AGTOB2, TS04 functions.
16 P407 bidirectional General I/O port 407 (5 V tolerant) with CTS4_RTS4/SS4/SDA0_B/USB_VBUS, GTIOC6A/AGTIO0/RTCOUT, ADTRG0, TS03 functions.
17 VSS_USB power_in USB ground pin.
18 USB_DM bidirectional D- pin of the USB on-chip transceiver; connect to the D- pin of the USB bus.
19 USB_DP bidirectional D+ pin of the USB on-chip transceiver; connect to the D+ pin of the USB bus.
20 VCC_USB power_in USB power supply pin; connect to VCC.
21 P207 bidirectional General I/O port 207 with TXD4/MOSI4/SDA4/QSSL and TSCAP (touch driver secondary power) functions.
22 P206 bidirectional General I/O port 206 (5 V tolerant) with IRQ0-DS, RXD4/MISO4/SCL4/CTS9/SDA1_B/USB_VBUSEN/SD0DAT2_A, GTIU, TS02 functions.
23 P205 bidirectional General I/O port 205 (5 V tolerant) with CLKOUT, IRQ1-DS, TXD4/MOSI4/SDA4/CTS9_RTS9/SS9/SCL1_B/USB_OVRCURA-DS/SD0DAT3_A, GTIV/GTIOC4A/AGTO1, TS01 functions.
24 P208 bidirectional General I/O port 208 with TDATA3, QIO3/SD0DAT0_B, GTOVLO functions.
25 RES input Reset signal input pin; the MCU enters the reset state when this signal goes low.
26 P201/MD input Port P201 / operating mode control pin MD; its level must not change during mode transition on release from reset.
27 P200 input General-purpose input-only pin P200 with NMI (non-maskable interrupt) function.
28 P304 bidirectional General I/O port 304 with IRQ9, GTOWLO/GTIOC7A/AGTEE2 functions.
29 P303 bidirectional General I/O port 303 with CTS9 and GTIOC7B functions.
30 P302 bidirectional General I/O port 302 with IRQ5, TXD2/MOSI2/SDA2/TXDX2/SIOX2/SSLA3, GTOUUP/GTIOC4A functions.
31 P301 bidirectional General I/O port 301 with IRQ6, RXD2/MISO2/SCL2/RXDX2/CTS9_RTS9/SS9/SSLA2, GTOULO/GTIOC4B/AGTIO0 functions.
32 P300/TCK/SWCLK bidirectional General I/O port 300 and debug TCK/SWCLK pin, with SSLA1 and GTOUUP/GTIOC0A functions.
33 P108/TMS/SWDIO bidirectional General I/O port 108 and debug TMS/SWDIO pin, with CTS9_RTS9/SS9/SSLA0, GTOULO/GTIOC0B/AGTOA3 functions.
34 P109/TDO/SWO bidirectional General I/O port 109 and debug TDO/SWO/CLKOUT pin, with TXD9/MOSI9/SDA9/MOSIA, GTOVUP/GTIOC1A/AGTOB3 functions.
35 P110/TDI bidirectional General I/O port 110 and debug TDI pin, with IRQ3, CTS2_RTS2/SS2/RXD9/MISO9/SCL9/MISOA, GTOVLO/GTIOC1B/AGTEE3 functions.
36 P111 bidirectional General I/O port 111 with IRQ4, SCK2/SCK9/RSPCKA, GTIOC3A/AGTOA5 functions.
37 P112 bidirectional General I/O port 112 with TXD2/MOSI2/SDA2/TXDX2/SIOX2/SCK1/SSLA0/QSSL/SSIBCK0_B, GTIOC3B/AGTOB5 functions.
38 P113 bidirectional General I/O port 113 with RXD2/MISO2/SCL2/RXDX2/SSILRCK0/SSIFS0_B, GTIOC2A/AGTEE5 functions.
39 VCC power_in Power supply pin; connect to the system power supply and to VSS by a 0.1-µF capacitor placed close to the pin.
40 VSS power_in Ground pin; connect to the system power supply (0 V).
41 P107 bidirectional General I/O port 107 with AGTOA0 function.
42 P106 bidirectional General I/O port 106 with AGTOB0 function.
43 P105 bidirectional General I/O port 105 with IRQ0, GTETRGA/GTIOC1A/AGTO2 functions.
44 P104 bidirectional General I/O port 104 with IRQ1, QIO2, GTETRGB/GTIOC1B/AGTEE2 functions.
45 P103 bidirectional General I/O port 103 with CTS0_RTS0/SS0/CTX0/QIO3, GTOWUP/GTIOC2A/AGTIO2 functions.
46 P102 bidirectional General I/O port 102 with SCK0/CRX0/QIO0, GTOWLO/GTIOC2B/AGTO0, ADTRG0 functions.
47 P101 bidirectional General I/O port 101 with IRQ1, TXD0/MOSI0/SDA0/CTS1_RTS1/SS1/QIO1, GTETRGB/GTIOC5A/AGTEE0 functions.
48 P100 bidirectional General I/O port 100 with IRQ2, RXD0/MISO0/SCL0/SCK1/QSPCLK, GTETRGA/GTIOC5B/AGTIO0 functions.
49 P500 bidirectional General I/O port 500 with CACREF, USB_VBUSEN/QSPCLK, GTIU/AGTOA0, AN016 functions.
50 VCC power_in Power supply pin; connect to the system power supply and to VSS by a 0.1-µF capacitor placed close to the pin.
51 VSS power_in Ground pin; connect to the system power supply (0 V).
52 P015 bidirectional General I/O port 015 with IRQ13 and AN013/DA1 analog functions.
53 P014 bidirectional General I/O port 014 with AN012/DA0 analog functions.
54 P013 bidirectional General I/O port 013 with AN011 analog input function.
55 VREFH power_in Analog reference voltage supply for the D/A converter; connect to AVCC0 when the DAC is not used.
56 AVCC0 power_in Analog voltage supply pin; supply the same voltage as the VCC pin.
57 AVSS0/VREFL power_in Analog ground and D/A converter reference ground; supply the same voltage as the VSS pin.
58 VREFL0 power_in Analog reference ground for the ADC12; connect to AVSS0 when the ADC12 is not used.
59 VREFH0 power_in Analog reference voltage supply for the ADC12; connect to AVCC0 when the ADC12 is not used.
60 P004 bidirectional General I/O port 004 with IRQ9-DS and AN004 analog input functions.
61 P003 bidirectional General I/O port 003 with AN003 analog input function.
62 P002 bidirectional General I/O port 002 with IRQ8-DS and AN002 analog input functions.
63 P001 bidirectional General I/O port 001 with IRQ7-DS and AN001 analog input functions.
64 P000 bidirectional General I/O port 000 with IRQ6-DS and AN000 analog input functions.

Key specifications

Parameter Value
Manufacturer RENESAS
Package LQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminal material (Pb-free) A: Sn (Tin) only 8

CAD (KiCad official)

  • Symbol: R7FA4M2AB3CFM#AA0
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: r7fa4m2ab3cfm-aa0-etched.step / r7fa4m2ab3cfm-aa0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); r7fa4m2ab3cfm-aa0.step / r7fa4m2ab3cfm-aa0.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (94 pp, sha256 313e2b830d9a36b5, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF