component
R7FA2E1A72DFL#AA0
Public Made by Adomby adom
RENESAS Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
R7FA2E1A72DFL#AA0
RENESAS · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
R7FA2E1A72DFL#AA0 from RENESAS, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P400 | bidirectional | General-purpose I/O port pin; the datasheet lists the general I/O ports as 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 2 | P401 | bidirectional | General-purpose I/O port pin; the general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 3 | VCL | passive | Connect this pin to VSS through the smoothing capacitor used to stabilize the internal power supply, placed close to the pin. |
| 4 | XCIN | input | Sub-clock oscillator input; connect a crystal resonator between XCOUT and XCIN (pin is P215 when used as GPIO). |
| 5 | XCOUT | output | Sub-clock oscillator output; connect a crystal resonator between XCOUT and XCIN (pin is P214 when used as GPIO). |
| 6 | VSS | power_in | Ground pin; connect it to the system power supply at 0 V. |
| 7 | XTAL | output | Pin for a crystal resonator to the main clock oscillator (MOSC, 1 to 20 MHz); pin is P213 when used as GPIO. |
| 8 | EXTAL | input | Main clock oscillator input; an external clock signal can be input through this pin (pin is P212 when used as GPIO). |
| 9 | VCC | power_in | Power supply pin; connect it to the system power supply (operating range 1.6 to 5.5 V) and to VSS through a 0.1-µF capacitor placed close to the pin. |
| 10 | P409 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 11 | P408 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 12 | P407 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 13 | P915 | bidirectional | General-purpose I/O port pin. |
| 14 | P914 | bidirectional | General-purpose I/O port pin. |
| 15 | P913 | bidirectional | General-purpose I/O port pin. |
| 16 | P208 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 17 | P207 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 18 | P206 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 19 | RES | input | Active-low reset input; the MCU enters the reset state when this signal goes low. |
| 20 | P201/MD | input | Operating mode control pin (MD); its signal level must not be changed during operating mode transition on release from reset. |
| 21 | P200 | input | General-purpose input-only pin (P200); NMI alternate function is listed for this pin in the pin list. |
| 22 | P302 | bidirectional | General-purpose I/O port pin. |
| 23 | P301 | bidirectional | General-purpose I/O port pin. |
| 24 | P300/SWCLK | input | Serial wire clock pin (SWCLK) for on-chip debug; the pin is also P300 GPIO. |
| 25 | P108/SWDIO | bidirectional | Serial wire debug data input/output pin (SWDIO); the pin is also P108 GPIO. |
| 26 | P109 | bidirectional | General-purpose I/O port pin; CLKOUT_B clock output is listed as an alternate function. |
| 27 | P110 | bidirectional | General-purpose I/O port pin. |
| 28 | P111 | bidirectional | General-purpose I/O port pin. |
| 29 | P112 | bidirectional | General-purpose I/O port pin; the same pin is also the TSCAP secondary power supply pin for the CTSU touch driver. |
| 30 | VCC | power_in | Power supply pin; connect it to the system power supply (operating range 1.6 to 5.5 V) and to VSS through a 0.1-µF capacitor placed close to the pin. |
| 31 | VSS | power_in | Ground pin; connect it to the system power supply at 0 V. |
| 32 | P104 | bidirectional | General-purpose I/O port pin. |
| 33 | P103 | bidirectional | General-purpose I/O port pin. |
| 34 | P102 | bidirectional | General-purpose I/O port pin. |
| 35 | P101 | bidirectional | General-purpose I/O port pin. |
| 36 | P100 | bidirectional | General-purpose I/O port pin. |
| 37 | P500 | bidirectional | General-purpose I/O port pin. |
| 38 | P015 | bidirectional | General-purpose I/O port pin. |
| 39 | P014 | bidirectional | General-purpose I/O port pin. |
| 40 | P013 | bidirectional | General-purpose I/O port pin. |
| 41 | P012 | bidirectional | General-purpose I/O port pin. |
| 42 | AVCC0 | power_in | Analog power supply pin for the 12-bit A/D converter (ADC12). |
| 43 | AVSS0 | power_in | Analog ground pin for the 12-bit A/D converter (ADC12). |
| 44 | P011/VREFL0 | power_in | ADC12 analog reference ground (VREFL0); connect to AVSS0 when the ADC12 is not used. |
| 45 | P010/VREFH0 | power_in | ADC12 analog reference voltage supply (VREFH0); connect to AVCC0 when the ADC12 is not used. |
| 46 | P002 | bidirectional | General-purpose I/O port pin. |
| 47 | P001 | bidirectional | General-purpose I/O port pin. |
| 48 | P000 | bidirectional | General-purpose I/O port pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | -0.5 | 6.5 | V | 23 | ||
| Input voltage, 5V-tolerant ports | Vin | -0.3 | 6.5 | V | 23 | ||
| Input voltage, P000 to P004, P010 to P015 (max printed as AVCC0 + 0.3) | Vin | -0.3 | V | 23 | |||
| Input voltage, other pins (max printed as VCC + 0.3) | Vin | -0.3 | V | 23 | |||
| Reference power supply voltage | VREFH0 | -0.3 | 6.5 | V | 23 | ||
| Analog power supply voltage | AVCC0 | -0.5 | 6.5 | V | 23 | ||
| Analog input voltage, AN000 to AN010 (max printed as AVCC0 + 0.3) | VAN | -0.3 | V | When AN000 to AN010 are used | 23 | ||
| Operating temperature (product with 85°C upper limit) | Topr | -40 | 85 | °C | Upper limit depends on product (Note 4) | 23 | |
| Operating temperature (product with 105°C upper limit) | Topr | -40 | 105 | °C | Upper limit depends on product (Note 4) | 23 | |
| Storage temperature | Tstg | -55 | 125 | °C | 24 | ||
| Power supply voltages | VCC | 1.6 | 5.5 | V | 24 | ||
| Analog power supply voltages | AVCC0 | 1.6 | 5.5 | V | 24 | ||
| VREFH0 reference voltage (max printed as AVCC0) | VREFH0 | 1.6 | V | When used as ADC12 reference | 24 | ||
| Permissible junction temperature | Tj | 125 | °C | High-speed, middle-speed, low-speed, Subosc-speed mode | 24 | ||
| Schmitt trigger input voltage, IIC (SMBus) VIH | VIH | 2.2 | V | VCC = 3.6 to 5.5 V | 25 | ||
| Input voltage, IIC (SMBus) VIH | VIH | 2 | V | VCC = 2.7 to 3.6 V | 25 | ||
| Input voltage, IIC (SMBus) VIL | VIL | 0.8 | V | VCC = 3.6 to 5.5 V | 25 | ||
| Input voltage, IIC (SMBus) VIL | VIL | 0.5 | V | VCC = 2.7 to 3.6 V | 25 | ||
| Input voltage, 5V-tolerant ports VIH (min printed as VCC × 0.8) | VIH | 5.8 | V | 5V-tolerant ports | 25 | ||
| Schmitt trigger input voltage, IIC VIH (min printed as VCC × 0.7) | VIH | 5.8 | V | IIC (except for SMBus) | 25 | ||
| Permissible output current per pin, ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 | IOH | -4 | mA | 25 | |||
| Permissible output current per pin, ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 | IOL | 8 | mA | 25 | |||
| Permissible output current per pin, other output pins | IOH | -4 | mA | 25 | |||
| Permissible output current per pin, other output pins | IOL | 20 | mA | 25 | |||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | -30 | mA | AVCC0 = 2.7 to 5.5 V | 27 | ||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | -8 | mA | AVCC0 = 1.8 to 2.7 V | 27 | ||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | -4 | mA | AVCC0 = 1.6 to 1.8 V | 27 | ||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | 50 | mA | AVCC0 = 2.7 to 5.5 V | 27 | ||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | 4 | mA | AVCC0 = 1.8 to 2.7 V | 27 | ||
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | 2 | mA | AVCC0 = 1.6 to 1.8 V | 27 | ||
| Total output current, all output pins, 48-pin | ΣIOH (max) | -60 | mA | 27 | |||
| Total output current, all output pins, 48-pin | ΣIOL (max) | 100 | mA | 27 | |||
| Output voltage, ports P000 to P004, P010 to P015 | VOL | 0.8 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 8.0 mA | 31 | ||
| Output voltage, ports P212, P213, P400, P401, P407 | VOL | 0.8 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 8.0 mA | 31 | ||
| Output voltage, other output pins | VOL | 1.2 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 20.0 mA | 31 | ||
| Output voltage, other output pins | VOL | 0.8 | V | VCC = AVCC0 = 2.7 to 4.0 V, IOL = 8.0 mA | 31 | ||
| Output voltage, ports P000 to P004, P010 to P015 | VOL | 0.4 | V | AVCC0 = 1.8 to 2.7 V, IOL = 0.6 mA | 31 | ||
| Output voltage, other output pins | VOL | 0.4 | V | VCC = 1.8 to 2.7 V, IOL = 0.6 mA | 31 | ||
| Input leakage current, RES, ports P200, P214, P215 | /Iin/ | 1 | µA | Vin = 0 V; Vin = VCC | 32 | ||
| Three-state leakage current, 5V-tolerant ports | /ITSI/ | 1 | µA | Vin = 0 V; Vin = 5.8 V | 32 | ||
| Three-state leakage current, other ports (except P200, P214, P215, 5V-tolerant) | ITSI | 1 | µA | Vin = 0 V; Vin = VCC | 32 | ||
| Input pull-up resistor, all ports (except P200, P214, P215) | RU | 10 | 20 | 100 | kΩ | Vin = 0 V | 32 |
| Input capacitance, P200 | Cin | 30 | pF | Vin = 0 V, f = 1 MHz, Ta = 25°C | 32 | ||
| Input capacitance, other input pins | Cin | 15 | pF | Vin = 0 V, f = 1 MHz, Ta = 25°C | 32 | ||
| Supply current, high-speed normal mode, ICLK = 48 MHz | ICC | 13 | mA | All peripheral clocks enabled, code executing from flash | 32 | ||
| Supply current, middle-speed normal mode, ICLK = 24 MHz | ICC | 8.1 | mA | All peripheral clocks enabled, code executing from flash | 33 | ||
| Supply current, low-speed normal mode, ICLK = 2 MHz | ICC | 2.2 | mA | All peripheral clocks enabled, code executing from flash | 33 | ||
| Supply current, Subosc-speed normal mode, ICLK = 32.768 kHz | ICC | 530 | µA | All peripheral clocks enabled, code executing from flash | 33 | ||
| Software Standby supply current, all SRAMs on | ICC | 0.25 | 1.3 | µA | Ta = 25°C | 34 | |
| Software Standby supply current, all SRAMs on | ICC | 0.55 | 3.7 | µA | Ta = 55°C | 34 | |
| Software Standby supply current, all SRAMs on | ICC | 1.95 | 12 | µA | Ta = 85°C | 34 | |
| Software Standby supply current, all SRAMs on | ICC | 3.9 | 42 | µA | Ta = 105°C | 34 | |
| Analog power supply current, high-speed 12-bit A/D conversion | IAVCC0 | 1.44 | mA | During 12-bit A/D conversion (high-speed conversion) | 34 | ||
| Analog power supply current, low-power 12-bit A/D conversion | IAVCC0 | 0.78 | mA | During 12-bit A/D conversion (low-power conversion) | 34 | ||
| Reference power supply current during 12-bit A/D conversion | IREFH0 | 120 | µA | During 12-bit A/D conversion | 34 | ||
| System clock (ICLK) operation frequency, high-speed mode | f | 0.032768 | 48 | MHz | VCC = AVCC0 = 1.8 to 5.5 V | 36 | |
| Peripheral module clock (PCLKB) operation frequency, high-speed mode | f | 32 | MHz | VCC = AVCC0 = 1.8 to 5.5 V | 36 |
CAD (KiCad official)
- Symbol:
R7FA2E1A72DFL#AA0 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
r7fa2e1a72dfl-aa0-etched.step/r7fa2e1a72dfl-aa0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r7fa2e1a72dfl-aa0.step/r7fa2e1a72dfl-aa0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (112 pp, sha256
4c1b8c680b6115de, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# R7FA2E1A72DFL#AA0
**RENESAS** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
R7FA2E1A72DFL#AA0 from RENESAS, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P400 | bidirectional | General-purpose I/O port pin; the datasheet lists the general I/O ports as 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 2 | P401 | bidirectional | General-purpose I/O port pin; the general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 3 | VCL | passive | Connect this pin to VSS through the smoothing capacitor used to stabilize the internal power supply, placed close to the pin. |
| 4 | XCIN | input | Sub-clock oscillator input; connect a crystal resonator between XCOUT and XCIN (pin is P215 when used as GPIO). |
| 5 | XCOUT | output | Sub-clock oscillator output; connect a crystal resonator between XCOUT and XCIN (pin is P214 when used as GPIO). |
| 6 | VSS | power_in | Ground pin; connect it to the system power supply at 0 V. |
| 7 | XTAL | output | Pin for a crystal resonator to the main clock oscillator (MOSC, 1 to 20 MHz); pin is P213 when used as GPIO. |
| 8 | EXTAL | input | Main clock oscillator input; an external clock signal can be input through this pin (pin is P212 when used as GPIO). |
| 9 | VCC | power_in | Power supply pin; connect it to the system power supply (operating range 1.6 to 5.5 V) and to VSS through a 0.1-µF capacitor placed close to the pin. |
| 10 | P409 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 11 | P408 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 12 | P407 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 13 | P915 | bidirectional | General-purpose I/O port pin. |
| 14 | P914 | bidirectional | General-purpose I/O port pin. |
| 15 | P913 | bidirectional | General-purpose I/O port pin. |
| 16 | P208 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 17 | P207 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 18 | P206 | bidirectional | General-purpose I/O port pin; general I/O ports are 5-V tolerant, open-drain capable, with input pull-up and switchable drive ability. |
| 19 | RES | input | Active-low reset input; the MCU enters the reset state when this signal goes low. |
| 20 | P201/MD | input | Operating mode control pin (MD); its signal level must not be changed during operating mode transition on release from reset. |
| 21 | P200 | input | General-purpose input-only pin (P200); NMI alternate function is listed for this pin in the pin list. |
| 22 | P302 | bidirectional | General-purpose I/O port pin. |
| 23 | P301 | bidirectional | General-purpose I/O port pin. |
| 24 | P300/SWCLK | input | Serial wire clock pin (SWCLK) for on-chip debug; the pin is also P300 GPIO. |
| 25 | P108/SWDIO | bidirectional | Serial wire debug data input/output pin (SWDIO); the pin is also P108 GPIO. |
| 26 | P109 | bidirectional | General-purpose I/O port pin; CLKOUT_B clock output is listed as an alternate function. |
| 27 | P110 | bidirectional | General-purpose I/O port pin. |
| 28 | P111 | bidirectional | General-purpose I/O port pin. |
| 29 | P112 | bidirectional | General-purpose I/O port pin; the same pin is also the TSCAP secondary power supply pin for the CTSU touch driver. |
| 30 | VCC | power_in | Power supply pin; connect it to the system power supply (operating range 1.6 to 5.5 V) and to VSS through a 0.1-µF capacitor placed close to the pin. |
| 31 | VSS | power_in | Ground pin; connect it to the system power supply at 0 V. |
| 32 | P104 | bidirectional | General-purpose I/O port pin. |
| 33 | P103 | bidirectional | General-purpose I/O port pin. |
| 34 | P102 | bidirectional | General-purpose I/O port pin. |
| 35 | P101 | bidirectional | General-purpose I/O port pin. |
| 36 | P100 | bidirectional | General-purpose I/O port pin. |
| 37 | P500 | bidirectional | General-purpose I/O port pin. |
| 38 | P015 | bidirectional | General-purpose I/O port pin. |
| 39 | P014 | bidirectional | General-purpose I/O port pin. |
| 40 | P013 | bidirectional | General-purpose I/O port pin. |
| 41 | P012 | bidirectional | General-purpose I/O port pin. |
| 42 | AVCC0 | power_in | Analog power supply pin for the 12-bit A/D converter (ADC12). |
| 43 | AVSS0 | power_in | Analog ground pin for the 12-bit A/D converter (ADC12). |
| 44 | P011/VREFL0 | power_in | ADC12 analog reference ground (VREFL0); connect to AVSS0 when the ADC12 is not used. |
| 45 | P010/VREFH0 | power_in | ADC12 analog reference voltage supply (VREFH0); connect to AVCC0 when the ADC12 is not used. |
| 46 | P002 | bidirectional | General-purpose I/O port pin. |
| 47 | P001 | bidirectional | General-purpose I/O port pin. |
| 48 | P000 | bidirectional | General-purpose I/O port pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | -0.5 | | 6.5 | V | | 23 |
| Input voltage, 5V-tolerant ports | Vin | -0.3 | | 6.5 | V | | 23 |
| Input voltage, P000 to P004, P010 to P015 (max printed as AVCC0 + 0.3) | Vin | -0.3 | | | V | | 23 |
| Input voltage, other pins (max printed as VCC + 0.3) | Vin | -0.3 | | | V | | 23 |
| Reference power supply voltage | VREFH0 | -0.3 | | 6.5 | V | | 23 |
| Analog power supply voltage | AVCC0 | -0.5 | | 6.5 | V | | 23 |
| Analog input voltage, AN000 to AN010 (max printed as AVCC0 + 0.3) | VAN | -0.3 | | | V | When AN000 to AN010 are used | 23 |
| Operating temperature (product with 85°C upper limit) | Topr | -40 | | 85 | °C | Upper limit depends on product (Note 4) | 23 |
| Operating temperature (product with 105°C upper limit) | Topr | -40 | | 105 | °C | Upper limit depends on product (Note 4) | 23 |
| Storage temperature | Tstg | -55 | | 125 | °C | | 24 |
| Power supply voltages | VCC | 1.6 | | 5.5 | V | | 24 |
| Analog power supply voltages | AVCC0 | 1.6 | | 5.5 | V | | 24 |
| VREFH0 reference voltage (max printed as AVCC0) | VREFH0 | 1.6 | | | V | When used as ADC12 reference | 24 |
| Permissible junction temperature | Tj | | | 125 | °C | High-speed, middle-speed, low-speed, Subosc-speed mode | 24 |
| Schmitt trigger input voltage, IIC (SMBus) VIH | VIH | 2.2 | | | V | VCC = 3.6 to 5.5 V | 25 |
| Input voltage, IIC (SMBus) VIH | VIH | 2 | | | V | VCC = 2.7 to 3.6 V | 25 |
| Input voltage, IIC (SMBus) VIL | VIL | | | 0.8 | V | VCC = 3.6 to 5.5 V | 25 |
| Input voltage, IIC (SMBus) VIL | VIL | | | 0.5 | V | VCC = 2.7 to 3.6 V | 25 |
| Input voltage, 5V-tolerant ports VIH (min printed as VCC × 0.8) | VIH | | | 5.8 | V | 5V-tolerant ports | 25 |
| Schmitt trigger input voltage, IIC VIH (min printed as VCC × 0.7) | VIH | | | 5.8 | V | IIC (except for SMBus) | 25 |
| Permissible output current per pin, ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 | IOH | | | -4 | mA | | 25 |
| Permissible output current per pin, ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 | IOL | | | 8 | mA | | 25 |
| Permissible output current per pin, other output pins | IOH | | | -4 | mA | | 25 |
| Permissible output current per pin, other output pins | IOL | | | 20 | mA | | 25 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | | | -30 | mA | AVCC0 = 2.7 to 5.5 V | 27 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | | | -8 | mA | AVCC0 = 1.8 to 2.7 V | 27 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOH (max) | | | -4 | mA | AVCC0 = 1.6 to 1.8 V | 27 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | | | 50 | mA | AVCC0 = 2.7 to 5.5 V | 27 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | | | 4 | mA | AVCC0 = 1.8 to 2.7 V | 27 |
| Total output current, 48-pin, ports P000 to P002, P010 to P015 | ΣIOL (max) | | | 2 | mA | AVCC0 = 1.6 to 1.8 V | 27 |
| Total output current, all output pins, 48-pin | ΣIOH (max) | | | -60 | mA | | 27 |
| Total output current, all output pins, 48-pin | ΣIOL (max) | | | 100 | mA | | 27 |
| Output voltage, ports P000 to P004, P010 to P015 | VOL | | | 0.8 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 8.0 mA | 31 |
| Output voltage, ports P212, P213, P400, P401, P407 | VOL | | | 0.8 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 8.0 mA | 31 |
| Output voltage, other output pins | VOL | | | 1.2 | V | VCC = AVCC0 = 4.0 to 5.5 V, IOL = 20.0 mA | 31 |
| Output voltage, other output pins | VOL | | | 0.8 | V | VCC = AVCC0 = 2.7 to 4.0 V, IOL = 8.0 mA | 31 |
| Output voltage, ports P000 to P004, P010 to P015 | VOL | | | 0.4 | V | AVCC0 = 1.8 to 2.7 V, IOL = 0.6 mA | 31 |
| Output voltage, other output pins | VOL | | | 0.4 | V | VCC = 1.8 to 2.7 V, IOL = 0.6 mA | 31 |
| Input leakage current, RES, ports P200, P214, P215 | /Iin/ | | | 1 | µA | Vin = 0 V; Vin = VCC | 32 |
| Three-state leakage current, 5V-tolerant ports | /ITSI/ | | | 1 | µA | Vin = 0 V; Vin = 5.8 V | 32 |
| Three-state leakage current, other ports (except P200, P214, P215, 5V-tolerant) | ITSI | | | 1 | µA | Vin = 0 V; Vin = VCC | 32 |
| Input pull-up resistor, all ports (except P200, P214, P215) | RU | 10 | 20 | 100 | kΩ | Vin = 0 V | 32 |
| Input capacitance, P200 | Cin | | | 30 | pF | Vin = 0 V, f = 1 MHz, Ta = 25°C | 32 |
| Input capacitance, other input pins | Cin | | | 15 | pF | Vin = 0 V, f = 1 MHz, Ta = 25°C | 32 |
| Supply current, high-speed normal mode, ICLK = 48 MHz | ICC | | | 13 | mA | All peripheral clocks enabled, code executing from flash | 32 |
| Supply current, middle-speed normal mode, ICLK = 24 MHz | ICC | | | 8.1 | mA | All peripheral clocks enabled, code executing from flash | 33 |
| Supply current, low-speed normal mode, ICLK = 2 MHz | ICC | | | 2.2 | mA | All peripheral clocks enabled, code executing from flash | 33 |
| Supply current, Subosc-speed normal mode, ICLK = 32.768 kHz | ICC | | | 530 | µA | All peripheral clocks enabled, code executing from flash | 33 |
| Software Standby supply current, all SRAMs on | ICC | | 0.25 | 1.3 | µA | Ta = 25°C | 34 |
| Software Standby supply current, all SRAMs on | ICC | | 0.55 | 3.7 | µA | Ta = 55°C | 34 |
| Software Standby supply current, all SRAMs on | ICC | | 1.95 | 12 | µA | Ta = 85°C | 34 |
| Software Standby supply current, all SRAMs on | ICC | | 3.9 | 42 | µA | Ta = 105°C | 34 |
| Analog power supply current, high-speed 12-bit A/D conversion | IAVCC0 | | | 1.44 | mA | During 12-bit A/D conversion (high-speed conversion) | 34 |
| Analog power supply current, low-power 12-bit A/D conversion | IAVCC0 | | | 0.78 | mA | During 12-bit A/D conversion (low-power conversion) | 34 |
| Reference power supply current during 12-bit A/D conversion | IREFH0 | | | 120 | µA | During 12-bit A/D conversion | 34 |
| System clock (ICLK) operation frequency, high-speed mode | f | 0.032768 | | 48 | MHz | VCC = AVCC0 = 1.8 to 5.5 V | 36 |
| Peripheral module clock (PCLKB) operation frequency, high-speed mode | f | | | 32 | MHz | VCC = AVCC0 = 1.8 to 5.5 V | 36 |
## CAD (KiCad official)
- Symbol: `R7FA2E1A72DFL#AA0`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `r7fa2e1a72dfl-aa0-etched.step` / `r7fa2e1a72dfl-aa0-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `r7fa2e1a72dfl-aa0.step` / `r7fa2e1a72dfl-aa0.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954627815038976) (112 pp, sha256 `4c1b8c680b6115de`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/r7fa2e1a72dfl-aa0-datasheet.pdf)