component

R7FA2E1A72DFJ#AA0

Public Made by Adom

by adom

RENESAS Microcontroller Units (MCUs/MPUs/SOCs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerr7fa2e1a72dfj#aa0factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
r7fa2e1a72dfj-aa0 / README.md
History Download
Ray Publish 0.1.0 2355ed3 1d ago

R7FA2E1A72DFJ#AA0

RENESAS · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)

R7FA2E1A72DFJ#AA0 from RENESAS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCL passive Internal power supply stabilization pin; connect to VSS through a smoothing capacitor placed close to the pin.
2 P215/XCIN input General-purpose input port P215 or sub-clock oscillator pin XCIN (connect a crystal between XCOUT and XCIN).
3 P214/XCOUT output General-purpose input port P214 or sub-clock oscillator output pin XCOUT for the crystal resonator.
4 VSS power_in Ground pin; connect to the system ground (0 V).
5 P213/XTAL output Port P213 or main clock crystal pin XTAL, also GTETRGA_D, GTIOC0A_D, TXD1_A/MOSI1_A/SDA1_A and IRQ2_B.
6 P212/EXTAL input Port P212 or main clock EXTAL pin (external clock input), also AGTEE1, GTETRGB_D, GTIOC0B_D, RXD1_A/MISO1_A/SCL1_A and IRQ3_B.
7 VCC power_in Power supply pin (1.6 to 5.5 V); connect to the system supply and bypass to VSS with a 0.1-µF capacitor close to the pin.
8 P407 bidirectional General I/O port P407 with AGTIO0_C, RTCOUT, CTS0_RTS0_D/SS0_D, SDA0_B and ADTRG0_B functions.
9 P914 bidirectional General I/O port P914 with AGTOA1_A and GTETRGB_F functions.
10 P913 bidirectional General I/O port P913 with AGTIO1_F and GTETRGA_F functions.
11 P208 bidirectional General I/O port P208 with AGTOB0_A function.
12 P207 bidirectional General-purpose I/O port P207.
13 RES input Reset input; the MCU enters the reset state when this signal goes low.
14 P201/MD input Operating mode control pin MD (shared with P201); the level must not be changed during mode transition on release from reset.
15 P200 input General-purpose input port P200 also used as non-maskable interrupt input NMI.
16 P300/SWCLK bidirectional Port P300 or serial wire debug clock SWCLK, also GTOUUP_C and GTIOC0A_A.
17 P108/SWDIO bidirectional Port P108 or serial wire debug data input/output SWDIO, also GTOULO_C, GTIOC0B_A and CTS9_RTS9_B/SS9_B.
18 P109 bidirectional General I/O port P109 with CLKOUT_B, GTOVUP_A, GTIOC4A_A, SCK1_E/TXD9_B/MOSI9_B/SDA9_B and TS10-CFC functions.
19 P110 bidirectional General I/O port P110 with GTOVLO_A, GTIOC4B_A, CTS2_RTS2_B/RXD9_B, VCOUT, TS11-CFC and IRQ3_A functions.
20 P112 bidirectional General I/O port P112 with AGTOB0, GTIOC6B_A, SCK1_D/TXD2_B and TSCAP (touch driver secondary supply capacitor pin) functions.
21 P103 bidirectional General I/O port P103 with GTOWUP_A, GTIOC5A_A, CTS0_RTS0_A/SS0_A, SSLA0_A, AN019, CMPREF1, TS14-CFC and KR03 functions.
22 P102 bidirectional General I/O port P102 with AGTO0, GTOWLO_A, GTIOC5B_A, SCK0_A, RSPCKA_A, ADTRG0_A/AN020, CMPIN1, TS15-CFC and KR02 functions.
23 P101 bidirectional General I/O port P101 with AGTEE0, GTETRGB_A, GTIOC8A_A, TXD0_A/SDA0_A, SDA0_C, MOSIA_A, AN021, CMPREF0, TS16-CFC and KR01/IRQ1_A functions.
24 P100 bidirectional General I/O port P100 with AGTIO0_A, GTETRGA_A, GTIOC8B_A, RXD0_A/SCL0_A/SCK1_A, SCL0_D, MISOA_A, AN022, CMPIN0, TS26-CFC and KR00/IRQ2_A functions.
25 P015 bidirectional General I/O port P015 with AN010, TS28-CFC and IRQ7_A functions.
26 P014 bidirectional General I/O port P014 with AN009 analog input function.
27 P013 bidirectional General I/O port P013 with AN008 and TS33-CFC functions.
28 P012 bidirectional General I/O port P012 with AN007 and TS32-CFC functions.
29 AVCC0 power_in Analog power supply pin for the ADC12.
30 AVSS0 power_in Analog ground pin for the ADC12.
31 P011/VREFL0 power_in Analog reference ground VREFL0 for the ADC12 (connect to AVSS0 when ADC12 unused), shared with P011, AN006 and TS31-CFC.
32 P010/VREFH0 power_in Analog reference voltage VREFH0 for the ADC12 (connect to AVCC0 when ADC12 unused), shared with P010, AN005 and TS30-CFC.

Key specifications

Parameter Value
Manufacturer RENESAS
Package LQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage (absolute max) VCC -0.5 6.5 V 24
Input voltage, 5V-tolerant ports Vin -0.3 6.5 V 5V-tolerant ports 24
Reference power supply voltage VREFH0 -0.3 6.5 V 24
Analog power supply voltage AVCC0 -0.5 6.5 V 24
Storage temperature Tstg -55 125 °C 25
Power supply voltage VCC 1.6 5.5 V 25
Analog power supply voltage AVCC0 1.6 5.5 V 25
Reference voltage VREFH0 min VREFH0 1.6 V When used as ADC12 reference; max is AVCC0 25
TSCAP external capacitance tolerance CTSCAP -10 10 % 10 nF, VCC = AVCC0 = 1.8 to 5.5 V 25
Permissible junction temperature Tj 125 °C Ta -40 to +105°C products; 105 for 85°C part numbers 25
Thermal resistance junction-to-ambient, 32-pin LQFP θja 60.9 °C/W JESD 51-2 and 51-7 compliant 37
Thermal resistance junction-to-top center case, 32-pin LQFP Ψjt 2.5 °C/W JESD 51-2 and 51-7 compliant 37
Permissible output current per pin IOH, P000-P004, P010-P015 etc. IOH -4 mA Ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 27
Permissible output current per pin IOL, P000-P004, P010-P015 etc. IOL 8 mA Ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 27
Permissible output current per pin IOL, other output pins IOL 20 mA Other output pins 27
Total IOH, P010-P015, 32-pin ΣIOH (max) -24 mA AVCC0 = 2.7 to 5.5 V 30
Total IOL, P010-P015, 32-pin ΣIOL (max) 48 mA AVCC0 = 2.7 to 5.5 V 30
Total IOH, all output pins, 32-pin ΣIOH (max) -54 mA 30
Total IOL, all output pins, 32-pin ΣIOL (max) 98 mA 30
Output voltage low, P000-P004, P010-P015 VOL 0.8 V IOL = 8.0 mA, VCC = AVCC0 = 4.0 to 5.5 V 31
Output voltage low, other pins VOL 1.2 V IOL = 20.0 mA, VCC = AVCC0 = 4.0 to 5.5 V 31
Input leakage current /Iin/ 1 µA RES, P200, P214, P215; Vin = 0 V, Vin = VCC 32
Three-state leakage current, 5V-tolerant ports /ITSI/ 1 µA Vin = 0 V, Vin = 5.8 V 32
Input pull-up resistor RU 10 20 100 kΩ Vin = 0 V 32
Input capacitance, P200 Cin 30 pF Vin = 0 V, f = 1 MHz, Ta = 25°C 32
Input capacitance, other input pins Cin 15 pF Vin = 0 V, f = 1 MHz, Ta = 25°C 32
Supply current, high-speed normal mode, peripherals enabled ICC 13 mA ICLK = 48 MHz, all peripheral clocks enabled, code from flash 33
Supply current, high-speed normal mode, peripherals disabled ICC 4.8 mA ICLK = 48 MHz, CoreMark from flash 33
Software standby current ICC 0.25 1.3 µA Ta = 25°C, all SRAMs on 35
Software standby current ICC 1.95 12 µA Ta = 85°C, all SRAMs on 35
Software standby current ICC 3.9 42 µA Ta = 105°C, all SRAMs on 35
Analog supply current, A/D conversion high-speed IAVCC0 1.44 mA During 12-bit A/D conversion, high-speed mode 35
System clock frequency ICLK, high-speed mode f 0.032768 48 MHz VCC = AVCC0 = 1.8 to 5.5 V 38
HOCO frequency 48 MHz fHOCO48 47.52 48 48.48 MHz Ta = -40 to 105°C, 1.6 ≤ VCC ≤ 5.5 39
MOCO frequency fMOCO 6.8 8 9.2 MHz 39
LOCO frequency fLOCO 27.8528 32.768 37.6832 kHz 39
IWDT-dedicated clock frequency fILOCO 12.75 15 17.25 kHz 39
Main clock oscillator frequency fMAIN 1 20 MHz 1.8 ≤ VCC ≤ 5.5 39
RES pulse width at power-on tRESWP 10 ms Figure 2.7 41
RES pulse width not at power-on tRESW 30 µs Figure 2.8 41
Offset error, high-precision channel 1 5.5 LSB High-speed A/D mode, VCC = AVCC0 = VREFH0 = 2.7 to 5.5 V 66
Absolute accuracy, high-precision channel 2.5 6 LSB High-speed A/D mode, VCC = AVCC0 = VREFH0 = 2.7 to 5.5 V 66
INL integral nonlinearity error 1.5 3 LSB High-speed A/D mode, VCC = AVCC0 = VREFH0 = 2.7 to 5.5 V 66
A/D internal reference voltage 1.42 1.48 1.54 V VCC = AVCC0 = VREFH0 = 1.8 to 5.5 V 71
TSN output voltage at 25°C 1.05 V VCC = 3.3 V 73
TSN temperature slope -3.3 mV/°C 73

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminal material (Pb-free) A: Sn (Tin) only 7

CAD (KiCad official)

  • Symbol: R7FA2E1A72DFJ#AA0
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: r7fa2e1a72dfj-aa0-etched.step / r7fa2e1a72dfj-aa0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); r7fa2e1a72dfj-aa0.step / r7fa2e1a72dfj-aa0.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (121 pp, sha256 9f16441e2434196a, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF