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R7FA2E1A52DFJ#HA0

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RENESAS Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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R7FA2E1A52DFJ#HA0

RENESAS · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

R7FA2E1A52DFJ#HA0 from RENESAS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCL passive Connect this pin to VSS through the smoothing capacitor that stabilizes the internal power supply, placed close to the pin.
2 P215/XCIN input Sub-clock oscillator input XCIN, with a crystal connected between XCOUT and XCIN; the pin is also general-purpose input P215.
3 P214/XCOUT output Sub-clock oscillator output XCOUT, with a crystal connected between XCOUT and XCIN; the pin is also general-purpose input P214.
4 VSS power_in Ground pin; connect it to the system power supply (0 V).
5 P213/XTAL output Crystal resonator output pin XTAL for the main clock oscillator; the pin is also general-purpose I/O P213.
6 P212/EXTAL input Main clock input EXTAL, where an external clock signal can be input; the pin is also general-purpose I/O P212.
7 VCC power_in Power supply pin rated 1.6 to 5.5 V for operation; connect it to the system supply and to VSS by a 0.1-µF capacitor placed close to the pin.
8 P407 bidirectional General-purpose I/O port pin P407, with alternate functions (AGT, RTC, SCI, IIC, ADC trigger) listed in the pin table.
9 P914 bidirectional General-purpose I/O port pin P914, with AGT and GPT alternate functions listed in the pin table.
10 P913 bidirectional General-purpose I/O port pin P913, with AGT and GPT alternate functions listed in the pin table.
11 P208 bidirectional General-purpose I/O port pin P208, with AGTOB0_A alternate function listed in the pin table.
12 P207 bidirectional General-purpose I/O port pin P207, with no alternate function listed in the pin table.
13 RES input Reset signal input; the MCU enters the reset state when this signal goes low.
14 P201/MD input Operating mode control pin MD, whose signal level must not be changed during operating mode transition on release from reset; the pin is also general-purpose I/O P201.
15 P200 input General-purpose input pin P200, which is also the non-maskable interrupt request input NMI.
16 P300/SWCLK input Serial wire clock input SWCLK for on-chip debug; the pin is also general-purpose I/O P300.
17 P108/SWDIO bidirectional Serial wire debug data input/output SWDIO; the pin is also general-purpose I/O P108.
18 P109 bidirectional General-purpose I/O port pin P109, with CLKOUT_B clock output and other alternate functions listed in the pin table.
19 P110 bidirectional General-purpose I/O port pin P110, with VCOUT comparator output and other alternate functions listed in the pin table.
20 P112 bidirectional General-purpose I/O port pin P112, which is also the TSCAP secondary power supply pin for the CTSU touch driver.
21 P103 bidirectional General-purpose I/O port pin P103, also multiplexed with ACMPLP reference input CMPREF1 and key interrupt KR03.
22 P102 bidirectional General-purpose I/O port pin P102, also multiplexed with ACMPLP analog input CMPIN1 and key interrupt KR02.
23 P101 bidirectional General-purpose I/O port pin P101, also multiplexed with ACMPLP reference input CMPREF0 and key interrupt KR01.
24 P100 bidirectional General-purpose I/O port pin P100, also multiplexed with ACMPLP analog input CMPIN0 and key interrupt KR00.
25 P015 bidirectional General-purpose I/O port pin P015, also multiplexed with ADC12 analog input AN010.
26 P014 bidirectional General-purpose I/O port pin P014, also multiplexed with ADC12 analog input AN009.
27 P013 bidirectional General-purpose I/O port pin P013, also multiplexed with ADC12 analog input AN008.
28 P012 bidirectional General-purpose I/O port pin P012, also multiplexed with ADC12 analog input AN007.
29 AVCC0 power_in Analog power supply pin for the ADC12.
30 AVSS0 power_in Analog ground pin for the ADC12.
31 P011/VREFL0 power_in Analog reference ground pin for the ADC12, which should be connected to AVSS0 when the ADC12 is not used; the pin is also general-purpose I/O P011.
32 P010/VREFH0 power_in Analog reference voltage supply pin for the ADC12, which should be connected to AVCC0 when the ADC12 is not used; the pin is also general-purpose I/O P010.

Key specifications

Parameter Value
Manufacturer RENESAS
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage VCC -0.5 6.5 V 24
Input voltage, 5V-tolerant ports Vin -0.3 6.5 V 5V-tolerant ports 24
Reference power supply voltage VREFH0 -0.3 6.5 V 24
Analog power supply voltage AVCC0 -0.5 6.5 V 24
Operating temperature (lower product range) Topr -40 85 °C 24
Operating temperature (upper product range) Topr -40 105 °C 24
Storage temperature Tstg -55 125 °C 25
Power supply voltages VCC 1.6 5.5 V 25
Analog power supply voltages AVCC0 1.6 5.5 V 25
Reference voltage VREFH0 VREFH0 1.6 V When used as ADC12 Reference (max printed as AVCC0) 25
Permissible junction temperature Tj 125 °C High-speed mode, Middle-speed mode, Low-speed mode, Subosc-speed mode 25
IIC (SMBus) input high voltage VIH 2.2 V VCC = 3.6 to 5.5 V 26
IIC (SMBus) input high voltage VIH 2 V VCC = 2.7 to 3.6 V 26
IIC (SMBus) input low voltage VIL 0.8 V VCC = 3.6 to 5.5 V 26
IIC (SMBus) input low voltage VIL 0.5 V VCC = 2.7 to 3.6 V 26
Permissible output current per pin, IOH IOH -4 mA Ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 26
Permissible output current per pin, IOL IOL 8 mA Ports P000 to P004, P010 to P015, P212, P213, P400, P401, P407 26
Permissible output current per pin, IOH (other output pins) IOH -4 mA Other output pins 26
Permissible output current per pin, IOL (other output pins) IOL 20 mA Other output pins 26
Permissible total output current, all output pins (32-pin product) ΣIOH (max) -54 mA 30
Permissible total output current, all output pins (32-pin product) ΣIOL (max) 98 mA 30
Permissible total output current, ports P010 to P015 (32-pin product) ΣIOH (max) -24 mA AVCC0 = 2.7 to 5.5 V 30
Permissible total output current, other output ports (32-pin product) ΣIOH (max) -30 mA VCC = 4.0 to 5.5 V 30
Permissible total output current, other output ports (32-pin product) ΣIOL (max) 50 mA VCC = 4.0 to 5.5 V 30
Output voltage, ports P000 to P004, P010 to P015 (VCC 4.0 to 5.5 V) VOL 0.8 V IOL = 8.0 mA 31
Output voltage, other output pins (VCC 4.0 to 5.5 V) VOL 1.2 V IOL = 20.0 mA 31
Output voltage, ports P212, P213, P400, P401, P407 (VCC 4.0 to 5.5 V) VOL 0.8 V IOL = 8.0 mA 31
Output voltage, output pins (VCC 2.7 to 4.0 V) VOL 0.8 V IOL = 8.0 mA 32
Output voltage, output pins (VCC 1.8 to 2.7 V) VOL 0.4 V IOL = 0.6 mA 32
Output voltage, output pins (VCC 1.6 to 1.8 V) VOL 0.4 V IOL = 0.3 mA 32
Input leakage current, RES, P200, P214, P215 Iin 1 µA Vin = 0 V; Vin = VCC 32
Three-state leakage current, 5V-tolerant ports ITSI 1 µA Vin = 0 V; Vin = 5.8 V 32
Three-state leakage current, other ports ITSI 1 µA Vin = 0 V; Vin = VCC 32
Input pull-up resistor RU 10 20 100 kΩ Vin = 0 V 32
Input capacitance, P200 Cin 30 pF Vin = 0 V; f = 1 MHz; Ta = 25°C 32
Input capacitance, other input pins Cin 15 pF Vin = 0 V; f = 1 MHz; Ta = 25°C 32
Supply current, high-speed mode, all peripheral clocks enabled ICC 13 mA All peripheral clocks enabled, code executing from flash; ICLK = 48 MHz 33
Supply current, middle-speed mode, all peripheral clocks enabled ICC 8.1 mA All peripheral clocks enabled, code executing from flash; ICLK = 24 MHz 34
Supply current, low-speed mode, all peripheral clocks enabled ICC 2.2 mA All peripheral clocks enabled, code executing from flash; ICLK = 2 MHz 34
Supply current, Subosc-speed mode, normal mode ICC 530 µA All peripheral clocks enabled, code executing from flash; ICLK = 32.768 kHz 34
Software standby supply current (all SRAMs on) ICC 0.25 1.3 µA All SRAMs on; Ta = 25°C 35
Software standby supply current (all SRAMs on) ICC 0.55 3.7 µA All SRAMs on; Ta = 55°C 35
Software standby supply current (all SRAMs on) ICC 1.95 12 µA All SRAMs on; Ta = 85°C 35
Software standby supply current (all SRAMs on) ICC 3.9 42 µA All SRAMs on; Ta = 105°C 35
Analog power supply current, high-speed A/D conversion IAVCC0 1.44 mA During 12-bit A/D conversion (high-speed A/D conversion mode) 35
Analog power supply current, low-power A/D conversion IAVCC0 0.78 mA During 12-bit A/D conversion (low-power A/D conversion mode) 35
Analog power supply current, waiting for A/D conversion IAVCC0 1 µA Waiting for 12-bit A/D conversion (all units) 35
Reference power supply current during A/D conversion IREFH0 120 µA During 12-bit A/D conversion 35
Reference power supply current, waiting for A/D conversion IREFH0 60 nA Waiting for 12-bit A/D conversion 35
Power-on VCC rising gradient SrVCC 0.02 2 ms/V Voltage monitor 0 reset disabled at startup 36
Allowable voltage change rising and falling gradient dt/dVCC 1 ms/V When VCC change exceeds VCC ± 10% 36
Allowable ripple frequency fr(VCC) 10 kHz Vr(VCC) ≤ VCC × 0.2 36
Allowable ripple frequency fr(VCC) 1 MHz Vr(VCC) ≤ VCC × 0.08 36
Allowable ripple frequency fr(VCC) 10 MHz Vr(VCC) ≤ VCC × 0.06 36
System clock (ICLK) operation frequency, high-speed mode f 0.032768 48 MHz VCC = AVCC0 = 1.8 to 5.5 V 37
Peripheral module clock (PCLKB) operation frequency, high-speed mode PCLKB 32 MHz VCC = AVCC0 = 1.8 to 5.5 V 37
System clock (ICLK) operation frequency, middle-speed mode f 0.032768 24 MHz VCC = AVCC0 = 1.8 to 5.5 V 37
System clock (ICLK) operation frequency, middle-speed mode f 0.032768 4 MHz VCC = AVCC0 = 1.6 to 1.8 V 37
System clock (ICLK) operation frequency, low-speed mode f 0.032768 2 MHz VCC = AVCC0 = 1.6 to 5.5 V 37
System clock (ICLK) operation frequency, Subosc-speed mode f 27.8528 32.768 37.6832 kHz VCC = AVCC0 = 1.6 to 5.5 V 38

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminal material (Pb-free) A: Sn(Tin) only 7

CAD (KiCad official)

  • Symbol: R7FA2E1A52DFJ#HA0
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: r7fa2e1a52dfj-ha0-etched.step / r7fa2e1a52dfj-ha0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); r7fa2e1a52dfj-ha0.step / r7fa2e1a52dfj-ha0.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (117 pp, sha256 c127a2522b8b94ad, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF