component

R5F524TAADFM#31

Public Made by Adom

by adom

RENESAS Pre-ordered MCUs, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersr5f524taadfm#31factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

R5F524TAADFM#31

RENESAS · Pre-ordered MCUs · TQFP-64(10x10)

R5F524TAADFM#31 from RENESAS, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P02 bidirectional I/O port 0 bit 2 multiplexed with MTIOC9D, CTS1#/RTS1#/SS1#, IRQ5 and ADST0.
2 P00 bidirectional I/O port 0 bit 0 multiplexed with IRQ2 and ADST1.
3 VCL passive Connect to VSS through a 4.7 µF smoothing capacitor placed close to the pin to stabilize the internal power supply; do not apply supply voltage to it.
4 MD input Operating mode setting pin (shared with FINED); its signal level must not be changed during operation.
5 P01 bidirectional I/O port 0 bit 1 multiplexed with POE12#, IRQ4 and ADST2.
6 RES# input Reset pin; the MCU enters the reset state when this signal goes low.
7 XTAL/P37 bidirectional Crystal connection pin (XTAL) shared with I/O port P37.
8 VSS power_in Ground pin; connect to the system power supply (0 V).
9 EXTAL/P36 bidirectional Crystal connection / external clock input pin (EXTAL) shared with I/O port P36.
10 VCC power_in Power supply pin; connect to the system power supply (2.7 V to 5.5 V).
11 PE2 input Input-only port E bit 2 multiplexed with POE10# and NMI (non-maskable interrupt request).
12 PD7 bidirectional I/O port D bit 7 multiplexed with MTIOC9A, TMRI1, TMRI5 and SSLA1.
13 PD6 bidirectional I/O port D bit 6 multiplexed with MTIOC9C, TMO1 and CTS1#/RTS1#/SS1#.
14 PD5 bidirectional I/O port D bit 5 multiplexed with TMRI0, TMRI6 and RXD1/SMISO1/SSCL1.
15 PD4 bidirectional I/O port D bit 4 multiplexed with TMCI0, TMCI6, SCK1 and IRQ2.
16 PD3 bidirectional I/O port D bit 3 multiplexed with TMO0 and TXD1/SMOSI1/SSDA1.
17 PB6 bidirectional I/O port B bit 6 multiplexed with RXD5/SMISO5/SSCL5 and IRQ5.
18 PB5 bidirectional I/O port B bit 5 multiplexed with TXD5/SMOSI5/SSDA5.
19 PB4 bidirectional I/O port B bit 4 multiplexed with POE8#, CTS5#/RTS5#/SS5# and IRQ3.
20 PB3 bidirectional I/O port B bit 3 multiplexed with MTIOC0A, CACREF, SCK6 and RSPCKA.
21 PB2 bidirectional I/O port B bit 2 multiplexed with MTIOC0B, TMRI0, ADSM0, TXD6/SMOSI6/SSDA6 and SDA0.
22 PB1 bidirectional I/O port B bit 1 multiplexed with MTIOC0C, TMCI0, ADSM1, RXD6/SMISO6/SSCL6 and SCL0.
23 VCC power_in Power supply pin; connect to the system power supply (2.7 V to 5.5 V).
24 P96 bidirectional I/O port 9 bit 6 multiplexed with POE4# and IRQ4.
25 VSS power_in Ground pin; connect to the system power supply (0 V).
26 P95 bidirectional I/O port 9 bit 5 multiplexed with MTIOC6B.
27 P94 bidirectional I/O port 9 bit 4 multiplexed with MTIOC7A.
28 P93 bidirectional I/O port 9 bit 3 multiplexed with MTIOC7B.
29 P92 bidirectional I/O port 9 bit 2 multiplexed with MTIOC6D.
30 P91 bidirectional I/O port 9 bit 1 multiplexed with MTIOC7C.
31 P90 bidirectional I/O port 9 bit 0 multiplexed with MTIOC7D.
32 P76 bidirectional I/O port 7 bit 6 multiplexed with MTIOC4D.
33 P75 bidirectional I/O port 7 bit 5 multiplexed with MTIOC4C.
34 P74 bidirectional I/O port 7 bit 4 multiplexed with MTIOC3D.
35 P73 bidirectional I/O port 7 bit 3 multiplexed with MTIOC4B.
36 P72 bidirectional I/O port 7 bit 2 multiplexed with MTIOC4A.
37 P71 bidirectional I/O port 7 bit 1 multiplexed with MTIOC3B.
38 P70 bidirectional I/O port 7 bit 0 multiplexed with POE0# and IRQ5.
39 VCC power_in Power supply pin; connect to the system power supply (2.7 V to 5.5 V).
40 P31 bidirectional I/O port 3 bit 1 multiplexed with MTIOC0A, MTCLKC, TMRI6, SSLA1 and IRQ6.
41 VSS power_in Ground pin; connect to the system power supply (0 V).
42 P30 bidirectional I/O port 3 bit 0 multiplexed with MTIOC0B, MTCLKD, TMCI6, SSLA0, IRQ7 and COMP3.
43 P24 bidirectional I/O port 2 bit 4 multiplexed with MTIC5U, TMCI2, TMO6, RSPCKA and COMP0.
44 P23 bidirectional I/O port 2 bit 3 multiplexed with MTIC5V, TMO2, CACREF, MOSIA and COMP1.
45 P22 bidirectional I/O port 2 bit 2 multiplexed with MTIC5W, TMRI2, TMO4, MISOA, ADTRG2# and COMP2.
46 P21 bidirectional I/O port 2 bit 1 multiplexed with MTCLKA, MTIOC9A, TMCI4, IRQ6, ADTRG1#, AN116 and CVREFC1.
47 AVCC2/VREF power_in Analog power supply and reference for 12-bit A/D converter unit 2, internally connected to VREF (comparator C and 8-bit D/A converter supply) on the 64-pin package.
48 AVSS2 power_in Analog ground and reference ground for 12-bit A/D converter unit 2, comparator C and the 8-bit D/A converter.
49 P54 bidirectional I/O port 5 bit 4 multiplexed with AN210 and IRQ2.
50 P53 bidirectional I/O port 5 bit 3 multiplexed with AN209 and IRQ1.
51 P52 bidirectional I/O port 5 bit 2 multiplexed with AN208 and IRQ0.
52 P51 bidirectional I/O port 5 bit 1 multiplexed with AN207.
53 P50 bidirectional I/O port 5 bit 0 multiplexed with AN206.
54 P46 bidirectional I/O port 4 bit 6 multiplexed with AN102, CMPC12, CMPC13, CMPC30 and CMPC31.
55 P45 bidirectional I/O port 4 bit 5 multiplexed with AN101, CMPC02, CMPC03, CMPC20 and CMPC21.
56 P44 bidirectional I/O port 4 bit 4 multiplexed with AN100, CMPC10, CMPC11, CMPC32 and CMPC33.
57 P42 bidirectional I/O port 4 bit 2 multiplexed with AN002.
58 P41 bidirectional I/O port 4 bit 1 multiplexed with AN001.
59 P40 bidirectional I/O port 4 bit 0 multiplexed with AN000, CMPC00, CMPC01, CMPC22 and CMPC23.
60 AVCC1 power_in Analog power supply and reference for 12-bit A/D converter unit 1.
61 AVCC0 power_in Analog power supply and reference for 12-bit A/D converter unit 0.
62 AVSS0 power_in Analog ground and reference ground for 12-bit A/D converter unit 0.
63 AVSS1 power_in Analog ground and reference ground for 12-bit A/D converter unit 1.
64 P11 bidirectional I/O port 1 bit 1 multiplexed with MTIOC3A, MTCLKC, TMO3 and IRQ1.

Key specifications

Parameter Value
Manufacturer RENESAS
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage (absolute max) VCC -0.3 6.5 V VSS = AVSS0 = AVSS1 = AVSS2 = 0 V 71
Input voltage, 5 V tolerant ports Vin -0.3 6.5 V Ports for 5 V tolerant 71
Analog power supply voltage AVCC0, AVCC1, AVCC2, VREF -0.3 6.5 V 71
Operating temperature Topr -40 85 °C 71
Storage temperature Tstg -55 125 °C 71
Power supply voltage VCC 2.7 5.5 V 71
Ground voltage VSS 0 V 71
Analog power supply voltage max AVCC0, AVCC1, AVCC2, VREF 5.5 V Min is VCC 71
Operating temperature range Ta -40 85 °C 72
Input leakage current /Iin/ 1 μA RES#, MD, port E2; Vin = 0 V, VCC 73
Three-state leakage current, port 4/5/6 /ITSI/ 1 μA Vin = 0 V, VREF 73
Three-state leakage current, ports except 5-V tolerant and port 4/5/6 /ITSI/ 0.2 μA Vin = 0 V, VCC 73
Three-state leakage current, 5 V tolerant ports /ITSI/ 1 μA Vin = 0 V, 5.8 V 73
Input capacitance Cin 4 15 pF Vin = 0 mV, f = 1 MHz, Ta = 25°C 73
Input pull-up resistor RU 10 20 50 kΩ Vin = 0 V 73
Supply current, high-speed normal mode, no peripheral operation (chip version A) ICC 26 mA ICLK = 80 MHz 73
Supply current, high-speed normal mode, all peripheral operation Normal (chip version A) ICC 35 mA ICLK = 80 MHz 73
Supply current, high-speed normal mode, all peripheral operation Max. (chip version A) ICC 70 mA ICLK = 80 MHz 73
Supply current, high-speed normal mode, all peripheral operation Max. (chip version A) ICC 60 mA ICLK = 64 MHz 73
Supply current, high-speed normal mode, all peripheral operation Max. (chip version A) ICC 40 mA ICLK = 32 MHz 73
Supply current, middle-speed normal mode, all peripheral operation Max. (chip version A) ICC 17 mA ICLK = 12 MHz 74
Supply current, software standby mode (chip version A) ICC 1 55 μA Ta = 25°C 75
Supply current, software standby mode (chip version A) ICC 1.5 60 μA Ta = 55°C 75
Supply current, software standby mode (chip version A) ICC 5.5 260 μA Ta = 85°C 75
Permissible total consumption power Pd 570 mW Total power dissipated by the entire chip (including output currents) 78
Analog supply current, A/D unit 0, PGA in use IAVCC 1.5 2.5 mA During A/D conversion (programmable gain amplifier in use) 78
Analog supply current, A/D unit 0, PGA not in use IAVCC 1 1.8 mA During A/D conversion (programmable gain amplifier not in use) 78
Analog supply current, A/D unit 1, S/H and PGA in use IAVCC 4.6 6.9 mA During A/D conversion (sample-and-hold circuits in use, programmable gain amplifier in use) 78
Analog supply current, A/D unit 2 IAVCC 1 1.8 mA 78
Analog supply current, D/A conversion per channel IAVCC 0.7 1 mA During D/A conversion (per channel) 78
Analog supply current waiting for A/D or D/A conversion (all units) IAVCC 2.2 μA Waiting for A/D or D/A conversion (all units) 78
Comparator C operating current ICMP 40 60 μA Comparator enabled 78
Power-on VCC rising gradient, normal startup SrVCC 0.02 20 ms/V At normal startup 78
Power-on VCC rising gradient, voltage monitoring 0 reset enabled SrVCC 0.02 ms/V Voltage monitoring 0 reset enabled at startup 78
Allowable voltage change rising/falling gradient dt/dVCC 1 ms/V When VCC change exceeds VCC ±10% 79
VCL pin external capacitance CVCL 3.3 4.7 6.1 μF 79
Permissible output low current, high-current ports IOL 10 mA Ports 71 to 76, port 81, ports 90 to 95, port B5, port D3 80
Permissible output low current, other ports high-drive IOL 8 mA Ports other than above, high-drive output mode 80
Permissible output low current, total of all output pins ΣIOL 110 mA 80
Permissible output high current, high-current ports IOH -5 mA Ports 71 to 76, port 81, ports 90 to 95, port B5, port D3 80
Permissible output high current, other ports high-drive IOH -8 mA Ports other than above, high-drive output mode 80
Permissible output high current, total of all output pins ΣIOH -35 mA 80
Output low voltage, high-current ports VOL 0.8 V IOL = 10.0mA 80
Output low voltage, RIIC pins fast mode VOL 0.6 V IOL = 6.0mA 80
Output low voltage, other ports normal output VOL 0.8 V IOL = 1.0mA 80
Operating frequency, system clock fmax 80 MHz ICLK, high-speed operating mode 89
LOCO clock oscillation frequency fLOCO 3.44 4 4.56 MHz 90
HOCO clock oscillation frequency 32 MHz fHOCO 31.68 32 32.32 MHz Ta = -20 to +75°C 90
HOCO clock oscillation frequency 64 MHz fHOCO 63.36 64 64.64 MHz Ta = -20 to +75°C 90
IWDT-dedicated clock oscillation frequency fILOCO 12.75 15 17.25 kHz 90
PLL circuit oscillation frequency fPLL 40 80 MHz 90
Main clock oscillator oscillation frequency fMAIN 1 20 MHz 90
EXTAL external clock input cycle time tXcyc 50 ns Figure 5.22 90
RES# pulse width at power-on tRESWP 3 ms Figure 5.29 93
RES# pulse width, other than power-on tRESW 30 μs Figure 5.30 93
NMI pulse width, digital filter disabled tNMIW 200 ns NMI digital filter disabled (NMIFLTE.NFLTEN = 0), tPcyc × 2 ≤ 200 ns 97

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Packaging/external pin surface treatment (lead-free) #3: Tray/Sn (Tin) only 8

CAD (KiCad official)

  • Symbol: R5F524TAADFM#31
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: r5f524taadfm-31-etched.step / r5f524taadfm-31-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); r5f524taadfm-31.step / r5f524taadfm-31.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (133 pp, sha256 5333b8f831d63caf, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF