component
R5F52318ADFM#10
Public Made by Adomby adom
RENESAS Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 8d ago |
| viewers | 8d ago |
| package.json | 8d ago |
| page.json | 8d ago |
| r5f52318adfm-10-etched.glb | 8d ago |
| r5f52318adfm-10-etched.step | 8d ago |
| r5f52318adfm-10-hero.glb | 8d ago |
| r5f52318adfm-10-hero.overlay.json | 8d ago |
| r5f52318adfm-10.glb | 8d ago |
| r5f52318adfm-10.kicad_mod | 8d ago |
| r5f52318adfm-10.kicad_sym | 8d ago |
| r5f52318adfm-10.lbr | 8d ago |
| r5f52318adfm-10.step | 8d ago |
| README.md | 8d ago |
R5F52318ADFM#10
RENESAS · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
R5F52318ADFM#10 from RENESAS, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P03 | bidirectional | I/O port P03 that also serves as the 12-bit D/A converter analog output DA0. |
| 2 | VCL | passive | Connect to VSS through a 4.7 µF multilayer ceramic smoothing capacitor placed close to the pin, and do not apply the supply voltage to this pin. |
| 3 | MD | input | Operating mode setting pin whose signal level must not be changed during operation, shared with the FINE interface pin FINED. |
| 4 | XCIN | input | Sub-clock oscillator input; connect a 32.768 kHz crystal between XCIN and XCOUT. |
| 5 | XCOUT | output | Sub-clock oscillator output; connect a 32.768 kHz crystal between XCIN and XCOUT. |
| 6 | RES# | input | Reset pin; the MCU enters the reset state when this signal goes low. |
| 7 | XTAL | output | Main clock oscillator output for connecting a crystal, sharing the pin with I/O port P37. |
| 8 | VSS | power_in | Ground pin; connect to the system power supply at 0 V. |
| 9 | EXTAL | input | Main clock oscillator input for a crystal or an external clock of up to 20 MHz, sharing the pin with I/O port P36. |
| 10 | VCC | power_in | Power supply pin; connect to the system power supply, which operates from 1.8 V to 5.5 V. |
| 11 | UPSEL | input | Boot-mode pin for the USB interface, sharing the pin with input-only port P35 and the NMI interrupt input. |
| 12 | VBATT | power_in | Backup power pin that allows the RTC to operate on battery backup power. |
| 13 | P31 | bidirectional | I/O port P31, multiplexed with MTIOC4D/TMCI2/RTCIC1, CTS1#/RTS1#/SS1#/SSISCK0 and IRQ1. |
| 14 | P30 | bidirectional | I/O port P30, multiplexed with MTIOC4B/TMRI3/POE8#/RTCIC0, RXD1/SMISO1/SSCL1/AUDIO_MCLK and IRQ0/CMPOB3. |
| 15 | P27 | bidirectional | I/O port P27, multiplexed with MTIOC2B/TMCI3, SCK1/SSIWS0, touch-sensing pin TS2 and CVREFB3. |
| 16 | P26 | bidirectional | I/O port P26, multiplexed with MTIOC2A/TMO1, TXD1/SMOSI1/SSDA1/USB0_VBUSEN/SSIRXD0, touch-sensing pin TS3 and CMPB3. |
| 17 | P17 | bidirectional | I/O port P17, multiplexed with MTIOC3A/MTIOC3B/TMO1/POE8#/TIOCB0/TCLKD, SCK1/MISOA/SDA/SSITXD0, IRQ7 and CMPOB2. |
| 18 | P16 | bidirectional | I/O port P16, multiplexed with MTIOC3C/MTIOC3D/TMO2/TIOCB1/TCLKC, TXD1/SMOSI1/SSDA1/MOSIA/SCL, USB0_VBUS/USB0_VBUSEN/USB0_OVRCURB, IRQ6 and ADTRG0#. |
| 19 | P15 | bidirectional | I/O port P15, multiplexed with MTIOC0B/MTCLKB/TMCI2/TIOCB2/TCLKB, RXD1/SMISO1/SSCL1/CRXD0, touch-sensing pin TS12, IRQ5 and CMPB2. |
| 20 | P14 | bidirectional | I/O port P14, multiplexed with MTIOC3A/MTCLKA/TMRI2/TIOCB5/TCLKA, CTS1#/RTS1#/SS1#/CTXD0/USB0_OVRCURA, touch-sensing pin TS13, IRQ4 and CVREFB2. |
| 21 | VCC_USB | power_in | Power supply pin for the USB module, connected to VCC or to VSS through a 0.33 µF smoothing capacitor, with a VCC_USB range of 3.0 to 5.5 V when the USB clock is in use. |
| 22 | USB0_DM | bidirectional | D- I/O pin of the USB 2.0 on-chip transceiver. |
| 23 | USB0_DP | bidirectional | D+ I/O pin of the USB 2.0 on-chip transceiver. |
| 24 | VSS_USB | power_in | Ground pin for the USB module; connect to VSS. |
| 25 | P55 | bidirectional | I/O port P55, multiplexed with MTIOC4D/TMO3, CRXD0 and touch-sensing pin TS15. |
| 26 | P54 | bidirectional | I/O port P54, multiplexed with MTIOC4B/TMCI1, CTXD0 and touch-sensing pin TS16. |
| 27 | UB | bidirectional | Boot-mode pin UB for USB boot mode, sharing the pin with I/O port PC7, which is multiplexed with MTIOC3A/MTCLKB/TMO2, TXD8/SMOSI8/SSDA8/MISOA and CACREF. |
| 28 | PC6 | bidirectional | I/O port PC6, multiplexed with MTIOC3C/MTCLKA/TMCI2, RXD8/SMISO8/SSCL8/MOSIA/USB0_EXICEN and touch-sensing pin TS22. |
| 29 | PC5 | bidirectional | I/O port PC5, multiplexed with MTIOC3B/MTCLKD/TMRI2, SCK8/RSPCKA/USB0_ID and touch-sensing pin TS23. |
| 30 | PC4 | bidirectional | I/O port PC4, multiplexed with MTIOC3D/MTCLKC/TMCI1/POE0#, SCK5/CTS8#/RTS8#/SS8#/SSLA0, SDHI_D1 and TSCAP, the touch-sensing LPF connection pin. |
| 31 | PC3 | bidirectional | I/O port PC3, multiplexed with MTIOC4D/TCLKB, TXD5/SMOSI5/SSDA5/IRTXD5, SDHI_D0 and touch-sensing pin TS27. |
| 32 | PC2 | bidirectional | I/O port PC2, multiplexed with MTIOC4B/TCLKA, RXD5/SMISO5/SSCL5/SSLA3/IRRXD5, SDHI_D3 and touch-sensing pin TS30. |
| 33 | PB7/PC1 | bidirectional | Pin shared by I/O ports PB7 and PC1, multiplexed with MTIOC3B/TIOCB5, TXD9/SMOSI9/SSDA9 and SDHI_D2. |
| 34 | PB6/PC0 | bidirectional | Pin shared by I/O ports PB6 and PC0, multiplexed with MTIOC3D/TIOCA5, RXD9/SMISO9/SSCL9 and SDHI_D1. |
| 35 | PB5 | bidirectional | I/O port PB5, multiplexed with MTIOC2A/MTIOC1B/TMRI1/POE1#/TIOCB4, SCK9/USB0_VBUS and SDHI_CD. |
| 36 | PB3 | bidirectional | I/O port PB3, multiplexed with MTIOC0A/MTIOC4A/TMO0/POE3#/TIOCD3/TCLKD, SCK6 and SDHI_WP. |
| 37 | PB1 | bidirectional | I/O port PB1, multiplexed with MTIOC0C/MTIOC4C/TMCI0/TIOCB3, TXD6/SMOSI6/SSDA6, SDHI_CLK and IRQ4/CMPOB1. |
| 38 | VCC | power_in | Power supply pin; connect to the system power supply. |
| 39 | PB0 | bidirectional | I/O port PB0, multiplexed with MTIC5W/TIOCA3, RXD6/SMISO6/SSCL6/RSPCKA and SDHI_CMD. |
| 40 | VSS | power_in | Ground pin; connect to the system power supply at 0 V. |
| 41 | PA6 | bidirectional | I/O port PA6, multiplexed with MTIC5V/MTCLKB/TMCI3/POE2#/TIOCA2, CTS5#/RTS5#/SS5#/MOSIA and SSIWS0. |
| 42 | PA4 | bidirectional | I/O port PA4, multiplexed with MTIC5U/MTCLKA/TMRI0/TIOCA1, TXD5/SMOSI5/SSDA5/SSLA0/SSITXD0/IRTXD5, IRQ5 and CVREFB1. |
| 43 | PA3 | bidirectional | I/O port PA3, multiplexed with MTIOC0D/MTCLKD/TIOCD0/TCLKB, RXD5/SMISO5/SSCL5/SSIRXD0/IRRXD5, IRQ6 and CMPB1. |
| 44 | PA1 | bidirectional | I/O port PA1, multiplexed with MTIOC0B/MTCLKC/TIOCB0, SCK5/SSLA2 and SSISCK0. |
| 45 | PA0 | bidirectional | I/O port PA0, multiplexed with MTIOC4A/TIOCA0, SSLA1 and CACREF. |
| 46 | PE5 | bidirectional | I/O port PE5, multiplexed with MTIOC4C/MTIOC2B, IRQ5, analog input AN021 and CMPOB0. |
| 47 | PE4 | bidirectional | I/O port PE4, multiplexed with MTIOC4D/MTIOC1A, analog input AN020, CMPA2 and CLKOUT. |
| 48 | PE3 | bidirectional | I/O port PE3, multiplexed with MTIOC4B/POE8#, CTS12#/RTS12#/SS12#/AUDIO_MCLK, analog input AN019 and CLKOUT. |
| 49 | PE2 | bidirectional | I/O port PE2, multiplexed with MTIOC4A, RXD12/RXDX12/SMISO12/SSCL12, IRQ7, analog input AN018 and CVREFB0. |
| 50 | PE1 | bidirectional | I/O port PE1, multiplexed with MTIOC4C, TXD12/TXDX12/SIOX12/SMOSI12/SSDA12, analog input AN017 and CMPB0. |
| 51 | PE0 | bidirectional | I/O port PE0, multiplexed with SCK12 and analog input AN016. |
| 52 | VREFL | power_in | Analog reference ground pin for the 12-bit D/A converter. |
| 53 | P46 | bidirectional | I/O port P46 with analog input AN006. |
| 54 | VREFH | power_in | Analog reference voltage supply pin for the 12-bit D/A converter. |
| 55 | P44 | bidirectional | I/O port P44 with analog input AN004. |
| 56 | P43 | bidirectional | I/O port P43 with analog input AN003. |
| 57 | P42 | bidirectional | I/O port P42 with analog input AN002. |
| 58 | P41 | bidirectional | I/O port P41 with analog input AN001. |
| 59 | VREFL0 | power_in | Analog reference ground pin for the 12-bit A/D converter. |
| 60 | P40 | bidirectional | I/O port P40 with analog input AN000. |
| 61 | VREFH0 | power_in | Analog reference voltage supply pin for the 12-bit A/D converter. |
| 62 | AVCC0 | power_in | Analog voltage supply pin for the 12-bit A/D and D/A converters; connect to VCC when they are not used. |
| 63 | P05 | bidirectional | I/O port P05 that also serves as the 12-bit D/A converter analog output DA1. |
| 64 | AVSS0 | power_in | Analog ground pin for the 12-bit A/D and D/A converters; connect to VSS when they are not used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC, VCC_USB | -0.3 | 6.5 | V | VSS = AVSS0 = VREFL0 = VSS_USB = 0 V | 76 | |
| VBATT power supply voltage | Vbatt | -0.3 | 6.5 | V | 76 | ||
| Input voltage, 5 V tolerant ports | Vin | -0.3 | 6.5 | V | Ports for 5 V tolerant | 76 | |
| Analog power supply voltage | AVCC0 | -0.3 | 6.5 | V | 76 | ||
| Operating temperature (85 °C product) | Topr | -40 | 85 | °C | Upper limit depends on product (section 1.2) | 76 | |
| Operating temperature (105 °C product) | Topr | -40 | 105 | °C | Upper limit depends on product (section 1.2) | 76 | |
| Storage temperature | Tstg | -55 | 125 | °C | 76 | ||
| Power supply voltage VCC | VCC | 1.8 | 5.5 | V | When USB is not used | 77 | |
| Power supply voltage VCC | VCC | 3 | 3.6 | V | When USB is used, when USB regulator is not used | 77 | |
| Power supply voltage VCC | VCC | 4 | 5.5 | V | When USB is used, when USB regulator is used | 77 | |
| VBATT power supply voltage | VBATT | 1.8 | 5.5 | V | 77 | ||
| Analog power supply voltage | AVCC0 | 1.8 | 5.5 | V | 77 | ||
| Reference power supply voltage | VREFH0 | 1.8 | V | 77 | |||
| Schmitt trigger input voltage, RIIC input pin (except SMBus, 5 V tolerant) | VIH | 5.8 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Schmitt trigger input voltage, ports 12, 13, 16, 17, port B5 (5 V tolerant) | VIH | 5.8 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Schmitt trigger input voltage, ports 03, 05, 07, ports 40 to 47 (VIL) | VIL | -0.3 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Schmitt trigger input voltage, RIIC input pin except SMBus (VIL) | VIL | -0.3 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Schmitt trigger input voltage, other than RIIC input pin or ports 30 to 32 (VIL) | VIL | -0.3 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Input level voltage, RIIC input pin (SMBus) (VIH) | VIH | 2.1 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | ||
| Input level voltage, RIIC input pin (SMBus) (VIL) | VIL | -0.3 | 0.8 | V | 2.7 V ≤ VCC ≤ 5.5 V, Ta = -40 to +105°C | 78 | |
| Input voltage, other than ports 03, 05, 07, 40 to 47 (VIL) | VIL | -0.3 | V | 1.8 V ≤ VCC < 2.7 V, Ta = -40 to +105°C | 79 | ||
| Input leakage current, RES#, MD, port 35 | /Iin/ | 1 | μA | Vin = 0 V, VCC | 79 | ||
| Three-state leakage current, ports for 5 V tolerant (off-state) | /ITSI/ | 1 | μA | Vin = 0 V, 5.8V | 79 | ||
| Three-state leakage current, ports except 5 V tolerant (off-state) | /ITSI/ | 0.2 | μA | Vin = 0 V, VCC | 79 | ||
| Input capacitance, all input pins except port 35, USB0_DM, USB0_DP | Cin | 15 | pF | Vin = 0 mV, f = 1 MHz, Ta = 25°C | 79 | ||
| Input capacitance, port 35, USB0_DM, USB0_DP | Cin | 30 | pF | Vin = 0 mV, f = 1 MHz, Ta = 25°C | 79 | ||
| Input pull-up resistor, all ports except port 35 | RU | 10 | 20 | 50 | kΩ | Vin = 0 V | 79 |
| Supply current, high-speed normal operating mode, all peripheral operation: Max. | ICC | 53.3 | mA | ICLK = 54 MHz | 80 | ||
| Supply current, high-speed normal operating mode, all peripheral operation: Max. | ICC | 40.8 | mA | ICLK = 32 MHz | 80 | ||
| Increase due to operation of the Trusted Secure IP | ICC | 2 | mA | PCLKB = 32 MHz | 80 | ||
| Supply current, middle-speed normal operating mode, all peripheral operation: Max. | ICC | 16.7 | mA | ICLK = 12 MHz | 81 | ||
| Supply current, low-speed normal operating mode, all peripheral operation: Max. | ICC | 74.4 | μA | ICLK = 32 kHz | 81 | ||
| Software standby mode supply current | ICC | 0.8 | 3.7 | μA | Ta = 25°C | 85 | |
| Software standby mode supply current | ICC | 1.2 | 4.3 | μA | Ta = 55°C | 85 | |
| Software standby mode supply current | ICC | 3.5 | 18.6 | μA | Ta = 85°C | 85 | |
| Software standby mode supply current | ICC | 7.9 | 45.2 | μA | Ta = 105°C | 85 | |
| Permissible total power consumption | Pd | 350 | mW | D-version product | 87 | ||
| Permissible total power consumption | Pd | 130 | mW | G-version product | 87 | ||
| Analog power supply current, during A/D conversion (at high-speed conversion) | IAVCC | 0.7 | 1.7 | mA | During A/D conversion (at high-speed conversion) | 88 | |
| Analog power supply current, during D/A conversion (per channel) | IAVCC | 0.4 | 0.8 | mA | During D/A conversion (per channel) | 88 | |
| Reference power supply current, during A/D conversion (at high-speed conversion) | IREFH0 | 25 | 150 | μA | During A/D conversion (at high-speed conversion) | 88 | |
| Comparator B operating current, window mode | ICMP | 12.5 | 28.6 | μA | Window mode | 88 | |
| USB suspended-state current | ISUSP | 0.35 | 170 | μA | Software standby mode, function controller full-speed (pull up USB0_DP); typ for VCC, max for VCC_USB | 88 | |
| RAM standby voltage | VRAM | 1.8 | V | 88 | |||
| Power-on VCC rising gradient | SrVCC | 0.02 | 20 | ms/V | At normal startup | 89 | |
| Power-on VCC rising gradient | SrVCC | 0.02 | 2 | ms/V | During fast startup time | 89 | |
| Power-on VCC rising gradient | SrVCC | 0.02 | ms/V | Voltage monitoring 0 reset enabled at startup | 89 | ||
| Allowable ripple frequency | fr (VCC) | 10 | kHz | Vr (VCC) ≤ VCC × 0.2 | 89 | ||
| Allowable ripple frequency | fr (VCC) | 1 | MHz | Vr (VCC) ≤ VCC × 0.08 | 89 | ||
| Allowable ripple frequency | fr (VCC) | 10 | MHz | Vr (VCC) ≤ VCC × 0.06 | 89 | ||
| Allowable voltage change rising/falling gradient | dt/dVCC | 1 | ms/V | When VCC change exceeds VCC ±10% | 89 | ||
| Permissible error of VCL pin external capacitance | CVCL | 1.4 | 4.7 | 7 | μF | 89 | |
| Permissible output low current (average per pin), ports 40 to 47, 03, 05, 07, 36, 37 | IOL | 4 | mA | Average value per pin, Ta = -40 to +105°C | 91 | ||
| Permissible output low current (average per pin), other ports, normal output mode | IOL | 4 | mA | Normal output mode, Ta = -40 to +105°C | 91 | ||
| Permissible output low current (average per pin), other ports, high-drive output mode | IOL | 8 | mA | High-drive output mode, Ta = -40 to +105°C | 91 | ||
| Permissible output low current, total of all output pins | ΣIOL | 60 | mA | Ta = -40 to +105°C | 91 | ||
| Output low voltage, normal output mode | VOL | 0.3 | V | 1.8 V ≤ VCC < 2.7 V, IOL = 0.5 mA | 92 | ||
| Output low voltage, high-drive output mode | VOL | 0.3 | V | 1.8 V ≤ VCC < 2.7 V, IOL = 1.0 mA | 92 | ||
| System clock (ICLK) maximum operating frequency | fmax | 54 | MHz | 2.7 V ≤ VCC ≤ 5.5 V | 101 |
CAD (KiCad official)
- Symbol:
R5F52318ADFM#10 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
r5f52318adfm-10-etched.step/r5f52318adfm-10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r5f52318adfm-10.step/r5f52318adfm-10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (170 pp, sha256
6b6da2f248584514, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).