component
R5F100FGAFP#10
Public Made by Adomby adom
RENESAS Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownR5F100FGAFP#10
RENESAS · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)
R5F100FGAFP#10 from RENESAS, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P147/ANI18 | bidirectional | Port 14 bit 7 I/O pin, also an A/D converter analog input (ANI18). |
| 2 | P146 | bidirectional | Port 14 bit 6 I/O pin; no alternate function is shown for this pin in the 44-pin figure. |
| 3 | P10/SCK00/SCL00/(TI07)/(TO07) | bidirectional | Port 1 bit 0 I/O pin, with serial clock SCK00/SCL00 and, via PIOR, timer TI07/TO07 functions. |
| 4 | P11/SI00/RxD0/TOOLRxD/SDA00/(TI06)/(TO06) | bidirectional | Port 1 bit 1 I/O pin, with serial data input SI00, UART receive RxD0, TOOLRxD and SDA00, and PIOR-selectable TI06/TO06. |
| 5 | P12/SO00/TxD0/TOOLTxD/(TI05)/(TO05) | bidirectional | Port 1 bit 2 I/O pin, with serial data output SO00, UART transmit TxD0, TOOLTxD, and PIOR-selectable TI05/TO05. |
| 6 | P13/TxD2/SO20/(SDAA0)/(TI04)/(TO04) | bidirectional | Port 1 bit 3 I/O pin, with UART2 transmit TxD2, serial data output SO20, and PIOR-selectable SDAA0, TI04/TO04. |
| 7 | P14/RxD2/SI20/SDA20/(SCLA0)/(TI03)/(TO03) | bidirectional | Port 1 bit 4 I/O pin, with UART2 receive RxD2, serial data input SI20, SDA20, and PIOR-selectable SCLA0, TI03/TO03. |
| 8 | P15/PCLBUZ1/SCK20/SCL20/(TI02)/(TO02) | bidirectional | Port 1 bit 5 I/O pin, with programmable clock/buzzer output PCLBUZ1, serial clock SCK20/SCL20, and PIOR-selectable TI02/TO02. |
| 9 | P16/TI01/TO01/INTP5/(RxD0) | bidirectional | Port 1 bit 6 I/O pin, with timer input TI01, timer output TO01, external interrupt INTP5, and PIOR-selectable RxD0. |
| 10 | P17/TI02/TO02/(TxD0) | bidirectional | Port 1 bit 7 I/O pin, with timer input TI02, timer output TO02, and PIOR-selectable TxD0. |
| 11 | P51/INTP2/SO11 | bidirectional | Port 5 bit 1 I/O pin, with external interrupt INTP2 and serial data output SO11. |
| 12 | P50/INTP1/SI11/SDA11 | bidirectional | Port 5 bit 0 I/O pin, with external interrupt INTP1, serial data input SI11 and SDA11. |
| 13 | P30/INTP3/RTC1HZ/SCK11/SCL11 | bidirectional | Port 3 bit 0 I/O pin, with external interrupt INTP3, real-time clock 1 Hz output RTC1HZ, and serial clock SCK11/SCL11. |
| 14 | P70/KR0/SCK21/SCL21 | bidirectional | Port 7 bit 0 I/O pin, with key return KR0 and serial clock SCK21/SCL21. |
| 15 | P71/KR1/SI21/SDA21 | bidirectional | Port 7 bit 1 I/O pin, with key return KR1, serial data input SI21 and SDA21. |
| 16 | P72/KR2/SO21 | bidirectional | Port 7 bit 2 I/O pin, with key return KR2 and serial data output SO21. |
| 17 | P73/KR3 | bidirectional | Port 7 bit 3 I/O pin, with key return KR3. |
| 18 | P31/TI03/TO03/INTP4/PCLBUZ0 | bidirectional | Port 3 bit 1 I/O pin, with timer input TI03, timer output TO03, external interrupt INTP4, and programmable clock/buzzer output PCLBUZ0. |
| 19 | P63 | bidirectional | Port 6 bit 3 I/O pin; no alternate function is shown for this pin in the 44-pin figure. |
| 20 | P62 | bidirectional | Port 6 bit 2 I/O pin; no alternate function is shown for this pin in the 44-pin figure. |
| 21 | P61/SDAA0 | bidirectional | Port 6 bit 1 I/O pin, with serial data SDAA0 for simplified I2C. |
| 22 | P60/SCLA0 | bidirectional | Port 6 bit 0 I/O pin, with serial clock SCLA0 for simplified I2C. |
| 23 | P41/TI07/TO07 | bidirectional | Port 4 bit 1 I/O pin, with timer input TI07 and timer output TO07. |
| 24 | P40/TOOL0 | bidirectional | Port 4 bit 0 I/O pin, also the data input/output pin for the on-chip debug tool (TOOL0). |
| 25 | RESET | input | Reset input pin for the microcontroller. |
| 26 | P124/XT2/EXCLKS | bidirectional | Port 12 bit 4 I/O pin, also subsystem clock crystal XT2 or external subsystem clock input EXCLKS. |
| 27 | P123/XT1 | bidirectional | Port 12 bit 3 I/O pin, also subsystem clock crystal oscillator pin XT1. |
| 28 | P137/INTP0 | bidirectional | Port 13 I/O pin, also external interrupt INTP0. |
| 29 | P122/X2/EXCLK | bidirectional | Port 12 bit 2 I/O pin, also main system clock crystal X2 or external clock input EXCLK. |
| 30 | P121/X1 | passive | Port 12 bit 1 I/O pin, also main system clock crystal oscillator pin X1. |
| 31 | REGC | passive | Regulator capacitance pin; connect to Vss via a capacitor of 0.47 to 1 µF. |
| 32 | VSS | power_in | Ground pin. |
| 33 | VDD | power_in | Power supply pin; single supply of 1.6 to 5.5 V per the product features. |
| 34 | P27/ANI7 | bidirectional | Port 2 bit 7 I/O pin, also A/D converter analog input ANI7. |
| 35 | P26/ANI6 | bidirectional | Port 2 bit 6 I/O pin, also A/D converter analog input ANI6. |
| 36 | P25/ANI5 | bidirectional | Port 2 bit 5 I/O pin, also A/D converter analog input ANI5. |
| 37 | P24/ANI4 | bidirectional | Port 2 bit 4 I/O pin, also A/D converter analog input ANI4. |
| 38 | P23/ANI3 | bidirectional | Port 2 bit 3 I/O pin, also A/D converter analog input ANI3. |
| 39 | P22/ANI2 | bidirectional | Port 2 bit 2 I/O pin, also A/D converter analog input ANI2. |
| 40 | P21/ANI1/AVREFM | bidirectional | Port 2 bit 1 I/O pin, also A/D converter analog input ANI1 and reference potential (-side) input AVREFM. |
| 41 | P20/ANI0/AVREFP | bidirectional | Port 2 bit 0 I/O pin, also A/D converter analog input ANI0 and reference potential (+side) input AVREFP. |
| 42 | P01/TO00/RxD1 | bidirectional | Port 0 bit 1 I/O pin, with timer output TO00 and UART1 receive RxD1. |
| 43 | P00/TI00/TxD1 | bidirectional | Port 0 bit 0 I/O pin, with timer input TI00 and UART1 transmit TxD1. |
| 44 | P120/ANI19 | bidirectional | Port 12 bit 0 I/O pin, also A/D converter analog input ANI19. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | LQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | -0.5 | 6.5 | V | 51 | ||
| EVDD0, EVDD1 supply voltage | EVDD0 | -0.5 | 6.5 | V | EVDD0 = EVDD1 | 51 | |
| EVSS0, EVSS1 supply voltage | EVSS0 | -0.5 | 0.3 | V | EVSS0 = EVSS1 | 51 | |
| REGC pin input voltage | VIREGC | -0.3 | 2.8 | V | REGC pin | 51 | |
| Input voltage (port pins) | VI1 | -0.3 | V | P00-P07, P10-P17, P30-P37, P40-P47, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100-P106, P110-P117, P120, P125-P127, P140-P147; max printed as EVDD0 +0.3 and VDD +0.3 | 51 | ||
| Input voltage (N-ch open-drain pins) | VI2 | -0.3 | 6.5 | V | P60-P63 (N-ch open-drain) | 51 | |
| Input voltage (VDD-referenced pins) | VI3 | -0.3 | V | P20-P27, P121-P124, P137, P150-P156, EXCLK, EXCLKS, RESET; max printed as VDD +0.3 | 51 | ||
| Output voltage (port pins) | VO1 | -0.3 | V | Output pins P00-P147 list; max printed as EVDD0 +0.3 and VDD +0.3 | 51 | ||
| Output voltage (VDD-referenced pins) | VO2 | -0.3 | V | P20-P27, P150-P156; max printed as VDD +0.3 | 51 | ||
| Analog input voltage (ANI16-ANI26) | VAI1 | -0.3 | V | ANI16-ANI26; max printed as EVDD0 +0.3 and AVREF(+) +0.3 | 51 | ||
| Analog input voltage (ANI0-ANI14) | VAI2 | -0.3 | V | ANI0-ANI14; max printed as VDD +0.3 and AVREF(+) +0.3 | 51 | ||
| Output current, high, per pin | IOH1 | -40 | mA | Per pin, P00-P07, P10-P17, P30-P37, P40-P47, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100-P106, P110-P117, P120, P125-P127, P130, P140-P147 | 52 | ||
| Output current, high, total of all pins | IOH1 | -170 | mA | Total of all pins | 52 | ||
| Output current, high, group total (P00-P04 group) | IOH1 | -70 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 | 52 | ||
| Output current, high, group total (P05/P06 group) | IOH1 | -100 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 | 52 | ||
| Output current, high, per pin (VDD-referenced pins) | IOH2 | -0.5 | mA | Per pin P20-P27, P150-P156 | 52 | ||
| Output current, high, total (VDD-referenced pins) | IOH2 | -2 | mA | Total of all pins | 52 | ||
| Output current, low, per pin | IOL1 | 40 | mA | Per pin, P00-P07, P10-P17, P30-P37, P40-P47, P50-P57, P60-P67, P70-P77, P80-P87, P90-P97, P100-P106, P110-P117, P120, P125-P127, P130, P140-P147 | 52 | ||
| Output current, low, total of all pins | IOL1 | 170 | mA | Total of all pins | 52 | ||
| Output current, low, group total (P00-P04 group) | IOL1 | 70 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 | 52 | ||
| Output current, low, group total (P05/P06 group) | IOL1 | 100 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P60-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 | 52 | ||
| Output current, low, per pin (VDD-referenced pins) | IOL2 | 1 | mA | Per pin P20-P27, P150-P156 | 52 | ||
| Output current, low, total (VDD-referenced pins) | IOL2 | 5 | mA | Total of all pins | 52 | ||
| Operating ambient temperature | TA | -40 | 85 | °C | In normal operation mode | 52 | |
| Storage temperature | Tstg | -65 | 150 | °C | 52 | ||
| X1 clock oscillation frequency | fX | 1 | 20 | MHz | Ceramic or crystal resonator, 2.7 V ≤ VDD ≤ 5.5 V | 53 | |
| X1 clock oscillation frequency | fX | 1 | 16 | MHz | Ceramic or crystal resonator, 2.4 V ≤ VDD < 2.7 V | 53 | |
| X1 clock oscillation frequency | fX | 1 | 8 | MHz | Ceramic or crystal resonator, 1.8 V ≤ VDD < 2.4 V | 53 | |
| X1 clock oscillation frequency | fX | 1 | 4 | MHz | Ceramic or crystal resonator, 1.6 V ≤ VDD < 1.8 V | 53 | |
| XT1 clock oscillation frequency | fX | 32 | 32.768 | 35 | kHz | Crystal resonator | 53 |
| High-speed on-chip oscillator clock frequency | fIH | 32 | MHz | 53 | |||
| High-speed on-chip oscillator clock frequency accuracy | fIH | -1 | 1 | % | -20 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V | 53 | |
| High-speed on-chip oscillator clock frequency accuracy | fIH | -5 | 5 | % | -20 to +85°C, 1.6 V ≤ VDD < 1.8 V | 53 | |
| High-speed on-chip oscillator clock frequency accuracy | fIH | -1.5 | 1.5 | % | -40 to -20°C, 1.8 V ≤ VDD ≤ 5.5 V | 53 | |
| High-speed on-chip oscillator clock frequency accuracy | fIH | -5.5 | 5.5 | % | -40 to -20°C, 1.6 V ≤ VDD < 1.8 V | 53 | |
| Low-speed on-chip oscillator clock frequency accuracy | fIL | -15 | 15 | % | 53 | ||
| Supply voltage operating range | VDD | 1.6 | 5.5 | V | TA = -40 to +85°C, VSS = 0 V | 53 | |
| Output current, high, per pin (port pins) | IOH1 | -10 | mA | Per pin, 1.6 V ≤ EVDD0 ≤ 5.5 V | 54 | ||
| Output current, high, group total (P00-P04 group) | IOH1 | -55 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 (duty ≤ 70%), 4.0 V ≤ EVDD0 ≤ 5.5 V | 54 | ||
| Output current, high, group total (P00-P04 group) | IOH1 | -10 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 (duty ≤ 70%), 2.7 V ≤ EVDD0 < 4.0 V | 54 | ||
| Output current, high, group total (P00-P04 group) | IOH1 | -5 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 (duty ≤ 70%), 1.8 V ≤ EVDD0 < 2.7 V | 54 | ||
| Output current, high, group total (P00-P04 group) | IOH1 | -2.5 | mA | Total of P00-P04, P07, P32-P37, P40-P47, P102-P106, P120, P125-P127, P130, P140-P145 (duty ≤ 70%), 1.6 V ≤ EVDD0 < 1.8 V | 54 | ||
| Output current, high, group total (P05/P06 group) | IOH1 | -80 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 (duty ≤ 70%), 4.0 V ≤ EVDD0 ≤ 5.5 V | 54 | ||
| Output current, high, group total (P05/P06 group) | IOH1 | -19 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 (duty ≤ 70%), 2.7 V ≤ EVDD0 < 4.0 V | 54 | ||
| Output current, high, group total (P05/P06 group) | IOH1 | -10 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 (duty ≤ 70%), 1.8 V ≤ EVDD0 < 2.7 V | 54 | ||
| Output current, high, group total (P05/P06 group) | IOH1 | -5 | mA | Total of P05, P06, P10-P17, P30, P31, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100, P101, P110-P117, P146, P147 (duty ≤ 70%), 1.6 V ≤ EVDD0 < 1.8 V | 54 | ||
| Output current, high, total of all pins | IOH1 | -135 | mA | Total of all pins (duty ≤ 70%), 1.6 V ≤ EVDD0 ≤ 5.5 V | 54 | ||
| Output current, high, per pin (VDD-referenced pins) | IOH2 | -0.1 | mA | Per pin P20-P27, P150-P156, 1.6 V ≤ VDD ≤ 5.5 V | 54 | ||
| Output current, high, total (VDD-referenced pins) | IOH2 | -1.5 | mA | Total of all pins (duty ≤ 70%), 1.6 V ≤ VDD ≤ 5.5 V | 54 | ||
| Output current, low, per pin (port pins) | IOL1 | 20 | mA | Per pin, P00-P07, P10-P17, P30-P37, P40-P47, P50-P57, P64-P67, P70-P77, P80-P87, P90-P97, P100-P106, P110-P117, P120, P125-P127, P130, P140-P147 | 55 | ||
| Output current, low, per pin (P60-P63) | IOL1 | 15 | mA | Per pin, P60-P63 | 55 | ||
| Output current, low, per pin (VDD-referenced pins) | IOL2 | 0.4 | mA | Per pin P20-P27, P150-P156 | 55 | ||
| Output current, low, total (VDD-referenced pins) | IOL2 | 5 | mA | Total of all pins (duty ≤ 70%), 1.6 V ≤ VDD ≤ 5.5 V | 55 | ||
| Input leakage current, high | ILIH1 | 1 | µA | VI = EVDD0 | 58 | ||
| Input leakage current, low | ILIL1 | -1 | µA | VI = EVSS0 | 58 | ||
| On-chip pull-up resistance | RU | 10 | 20 | 100 | kΩ | VI = EVSS0, in input port | 58 |
| Output voltage, low (port pins) | VOL1 | 1.3 | V | 4.0 V ≤ EVDD0 ≤ 5.5 V, IOL1 = 20 mA | 57 | ||
| Output voltage, low (port pins) | VOL1 | 0.7 | V | 4.0 V ≤ EVDD0 ≤ 5.5 V, IOL1 = 8.5 mA | 57 | ||
| POR detection voltage (rising) | VPOR | 1.47 | 1.51 | 1.55 | V | The power supply voltage is rising. | 114 |
| Data retention supply voltage | VDDDR | 1.46 | 5.5 | V | 117 |
CAD (KiCad official)
- Symbol:
R5F100FGAFP#10 - Footprint:
Package_QFP:LQFP-44_10x10mm_P0.8mm - 3D model: LQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
r5f100fgafp-10-etched.step/r5f100fgafp-10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r5f100fgafp-10.step/r5f100fgafp-10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (219 pp, sha256
363a7745eaa9e002, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).