# R5460N213AD-TR-FE

**Ricoh Elec Devices** · Battery Management ICs · SOT-23-6

R5460N213AD-TR-FE from Ricoh Elec Devices, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DOUT | output | Over-discharge detection output with CMOS output type; its absolute maximum voltage is Vss-0.3 V to VDD+0.3 V. |
| 2 | COUT | output | Over-charge detection output with CMOS output type; its absolute maximum voltage is VDD-30 V to VDD+0.3 V. |
| 3 | V- | power_in | Charger negative input pin used for the excess charge and discharge current detection; its absolute maximum voltage is VDD-30 V to VDD+0.3 V. |
| 4 | VC | input | Input pin for the center voltage between the two cells; its absolute maximum voltage is Vss-0.3 V to VDD+0.3 V. |
| 5 | VDD | power_in | Positive power supply pin that also sets the substrate voltage level of the IC; operating input voltage (VDD-VSS) is 1.5 V to 10.0 V with an absolute maximum of -0.3 V to 12 V. |
| 6 | VSS | power_in | Ground pin for the IC; it is the reference for the operating input voltage VDD-VSS (1.5 V to 10.0 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Ricoh Elec Devices |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VDD, Vss=0V) | VDD | -0.3 |  | 12 | V | Ta=25C, Vss=0V | 5 |
| Power dissipation | PD |  |  | 150 | mW |  | 5 |
| Operating temperature | Ta | -40 |  | 85 | C |  | 5 |
| Storage temperature | Tstg | -55 |  | 125 | C |  | 5 |
| Operating input voltage (VDD-VSS) | VDD1 | 1.5 |  | 10 | V | Voltage defined as VDD-VSS | 6 |
| Over-discharge detector threshold CELL1 (VDET2U) tolerance | VDET2U | -2.5 |  | 2.5 | % | Detect falling edge of supply voltage | 2 |
| Over-discharge detector threshold CELL1 (VDET2U) nominal, 213AD | VDET2U |  | 2 |  | V |  | 32 |
| Released voltage from over-discharge CELL1 (VREL2U) tolerance | VREL2U | -2.5 |  | 2.5 | % | Detect rising edge of supply voltage | 2 |
| Released voltage from over-discharge CELL1 (VREL2U) nominal, 213AD | VREL2U |  | 2.5 |  | V |  | 32 |
| Over-discharge detector threshold CELL2 (VDET2L) tolerance | VDET2L | -2.5 |  | 2.5 | % | Detect falling edge of supply voltage | 2 |
| Over-discharge detector threshold CELL2 (VDET2L) nominal, 213AD | VDET2L |  | 2 |  | V |  | 32 |
| Released voltage from over-discharge CELL2 (VREL2L) tolerance | VREL2L | -2.5 |  | 2.5 | % | Detect rising edge of supply voltage | 2 |
| Released voltage from over-discharge CELL2 (VREL2L) nominal, 213AD | VREL2L |  | 2.5 |  | V |  | 32 |
| Output delay of over-discharge (tVDET2) | tVDET2 | 89 | 128 | 167 | ms | VDD-VC=3.2V to 1.9V, VC-VSS=3.2V | 6 |
| Output delay of release from over-discharge (tVREL2) | tVREL2 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=1.9V to 3.2V, VC-VSS=3.2V | 6 |
| Excess discharge-current threshold (VDET3) tolerance | VDET3 | -0.015 | 0.2 | 0.015 | V | Detect rising edge of 'V-' pin voltage | 6 |
| Output delay of excess discharge current (tVDET3) | tVDET3 | 8 | 12 | 16 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to 0.5V | 6 |
| Output delay of release from excess discharge current (tVREL3) | tVREL3 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=3V to 0V | 6 |
| Excess charge-current threshold (VDET4), option -0.2V row | VDET4 | -0.23 | -0.2 | -0.17 | V | Detect falling edge of 'V-' pin voltage | 6 |
| Output delay of excess charge current (tVDET4) | tVDET4 | 5 | 8 | 11 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to -1V | 6 |
| Output delay of release from excess charge current (tVREL4) | tVREL4 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=-1V to 0V | 6 |
| Short protection voltage | Vshort | 0.7 | 1.1 | 1.5 | V | VDD-VC=VC-VSS=3.2V | 6 |
| Output delay of short protection | tshort | 150 | 300 | 500 | us | VDD-VC=VC-VSS=3.2V, V-=0V to 6.4V | 6 |
| Reset resistance for excess discharge-current protection | Rshort | 25 | 40 | 75 | kOhm | VDD-VC=VC-VSS=3.2V, V-=1V | 6 |
| Delay shortening mode input voltage | VDS | -2.2 | -1.6 | -1 | V | VDD-VC=VC-VSS=4.0V | 6 |
| Nch ON voltage of COUT (VOL1) | VOL1 |  | 0.4 | 0.5 | V | IOL=50uA, VDD-VC=VC-VSS=4.5V | 6 |
| Pch ON voltage of COUT (VOH1) | VOH1 | 6.8 | 7.4 |  | V | IOH=-50uA, VDD-VC=VC-VSS=3.2V | 6 |
| Nch ON voltage of DOUT (VOL2) | VOL2 |  | 0.2 | 0.5 | V | IOL=50uA, VDD-VC=VC-VSS=1.9V | 6 |
| Pch ON voltage of DOUT (VOH2) | VOH2 | 6.8 | 7.4 |  | V | IOH=-50uA, VDD-VC=VC-VSS=3.2V | 6 |
| Supply current (IDD) | IDD |  | 4 | 8 | uA | VDD-VC=VC-VSS=3.2V, V-=0V | 6 |
| Standby current (IS) | IS |  | 1.2 | 2 | uA | VDD-VC=VC-VSS=1.9V | 6 |

## CAD (KiCad official)

- Symbol: `R5460N213AD-TR-FE`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `r5460n213ad-tr-fe-etched.step` / `r5460n213ad-tr-fe-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `r5460n213ad-tr-fe.step` / `r5460n213ad-tr-fe.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Ricoh Elec Devices datasheet](docs/r5460n213ad-tr-fe-datasheet.pdf) (33 pp, sha256 `1b26c54b8790b19f`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/r5460n213ad-tr-fe-datasheet.pdf)