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R5460N210AD-TR-FE
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Ricoh Elec Devices Battery Management ICs, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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R5460N210AD-TR-FE
Ricoh Elec Devices · Battery Management ICs · SOT-23-6
R5460N210AD-TR-FE from Ricoh Elec Devices, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DOUT | output | Output pin for over-discharge detection and protection (CMOS output), with a high level equal to VDD and a low level equal to VSS. |
| 2 | COUT | output | Output pin for over-charge detection and protection (CMOS output), whose low level is set by the V- pin voltage and whose high level is VDD. |
| 3 | V- | power_in | Negative input pin for the charger; it is pulled to VSS by an internal discharge-overcurrent release resistor (25 to 75 kΩ, typ. 40 kΩ) and its voltage sets the charge/discharge overcurrent thresholds. |
| 4 | VC | input | Monitoring input for the intermediate voltage between the two series-connected cells. |
| 5 | VDD | power_in | Power supply pin that also provides the IC substrate potential; the operating input voltage (VDD-VSS) is 1.5 V to 10.0 V and the absolute maximum rating is -0.3 V to 12 V. |
| 6 | VSS | power_in | Ground pin of the IC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Ricoh Elec Devices |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VDD1 | 1.5 | 10 | V | defined as VDD-VSS | 6 | |
| 0V charge allowed minimum voltage | Vst | 1.8 | V | defined as VDD-V-, VDD-VSS=0V | 6 | ||
| Battery 1 overdischarge detection voltage accuracy | VDET2U | -2.5 | 2 | 2.5 | % | detection supply falling edge | 2 |
| Battery 1 overdischarge release voltage accuracy | VREL2U | -2.5 | 2.5 | 2.5 | % | detection supply rising edge | 2 |
| Battery 2 overdischarge detection voltage accuracy | VDET2L | -2.5 | 2 | 2.5 | % | detection supply falling edge | 2 |
| Battery 2 overdischarge release voltage accuracy | VREL2L | -2.5 | 2.5 | 2.5 | % | detection supply rising edge | 2 |
| Discharge overcurrent detection voltage tolerance | VDET3 | -0.015 | 0.2 | 0.015 | V | V- pin voltage rising edge | 6 |
| Charge overcurrent detection voltage | VDET4 | -0.23 | -0.2 | -0.17 | V | V- pin voltage falling edge; -0.2V option row | 6 |
| Load short detection voltage | Vshort | 0.7 | 1.1 | 1.5 | V | VDD-VC=VC-VSS=3.2V | 6 |
| Overdischarge current protection release resistance | Rshort | 25 | 40 | 75 | kΩ | VDD-VC=VC-VSS=3.2V, V-=1V | 6 |
| Delay-shortening mode voltage | VDS | -2.2 | -1.6 | -1 | V | VDD-VC=VC-VSS=4.0V | 6 |
| COUT Nch on-voltage | VOL1 | 0.5 | V | Iol=50µA, VDD-VC=VC-VSS=4.5V | 6 | ||
| COUT Pch on-voltage | VOH1 | 6.8 | 7.4 | V | Ioh=-50µA, VDD-VC=VC-VSS=3.2V | 6 | |
| DOUT Nch on-voltage | VOL2 | 0.5 | V | Iol=50µA, VDD-VC=VC-VSS=1.9V | 6 | ||
| DOUT Pch on-voltage | VOH2 | 6.8 | 7.4 | V | Ioh=-50µA, VDD-VC=VC-VSS=3.2V | 6 | |
| Consumption current | IDD | 4 | 8 | µA | VDD-VC=VC-VSS=3.2V, V-=0V | 6 | |
| Standby current | IS | 1.2 | 2 | µA | VDD-VC=VC-VSS=1.9V | 6 | |
| Overcharge detection delay time | tVDET1 | 0.7 | 1 | 1.3 | s | VDD=3.2V to 4.5V, VC-VSS=3.2V | 6 |
| Overcharge release delay time | tVREL1 | 11 | 16 | 21 | ms | VDD=4.5V to 3.2V, VC-VSS=3.2V | 6 |
| Overdischarge detection delay time | tVDET2 | 89 | 128 | 167 | ms | VDD-VC=3.2V to 1.9V, VC-VSS=3.2V | 6 |
| Overdischarge release delay time | tVREL2 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=1.9V to 3.2V, VC-VSS=3.2V | 6 |
| Discharge overcurrent detection delay time | tVDET3 | 8 | 12 | 16 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to 0.5V | 6 |
| Discharge overcurrent release delay time | tVREL3 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=3V to 0V | 6 |
| Charge overcurrent detection delay time | tVDET4 | 5 | 8 | 11 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to -1V | 6 |
| Charge overcurrent release delay time | tVREL4 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=-1V to 0V | 6 |
| Load short detection delay time | tshort | 150 | 300 | 500 | µs | VDD-VC=VC-VSS=3.2V, V-=0V to 6.4V | 6 |
| Supply voltage (absolute maximum) | VDD | -0.3 | 12 | V | 5 | ||
| VC input voltage (absolute maximum) | VC | -0.3 | V | min relative to VSS; max is VDD+0.3 | 5 | ||
| V- input voltage (absolute maximum) | V- | -30 | 0.3 | V | relative to VDD (VDD-30 to VDD+0.3) | 5 | |
| COUT output voltage (absolute maximum) | VCOUT | -30 | 0.3 | V | relative to VDD (VDD-30 to VDD+0.3) | 5 | |
| DOUT output voltage (absolute maximum) | VDOUT | -0.3 | V | min relative to VSS; max is VDD+0.3 | 5 | ||
| Allowable power dissipation | PD | 150 | mW | 5 | |||
| Operating temperature range | Topt | -40 | 85 | °C | 5 | ||
| Storage temperature range | Tstg | -55 | 125 | °C | 5 |
CAD (KiCad official)
- Symbol:
R5460N210AD-TR-FE - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
r5460n210ad-tr-fe-etched.step/r5460n210ad-tr-fe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r5460n210ad-tr-fe.step/r5460n210ad-tr-fe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Ricoh Elec Devices datasheet (35 pp, sha256
c559492f93d24fb8, retrieved 2026-10-30, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).