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R5460N208AA-TR-FE
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Ricoh Elec Devices Battery Management, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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R5460N208AA-TR-FE
Ricoh Elec Devices · Battery Management · SOT-23-6
R5460N208AA-TR-FE from Ricoh Elec Devices, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DOUT | output | Output pin of the over-discharge and excess discharge-current detectors, CMOS output, switching to L after a fixed internal delay when discharge voltage crosses the detector threshold. |
| 2 | COUT | output | Output pin of the over-charge detector, CMOS output, switching to L after a fixed internal delay when the over-charge threshold is crossed (returns to H on release). |
| 3 | V- | power_in | Charger negative input pin, used for excess charge-current and excess discharge-current detection; the code list gives an excess discharge-current threshold of 0.200 V and an excess charge-current threshold of -0.200 V for version R5460N208AA. |
| 4 | VC | input | Input pin for the center voltage between the two cells. |
| 5 | VDD | power_in | Power supply pin and substrate voltage level of the IC; operating input voltage (VDD-VSS) is 1.5 V to 10.0 V, absolute maximum -0.3 V to 12 V. |
| 6 | VSS | power_in | Ground pin for the IC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Ricoh Elec Devices |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VDD1 | 1.5 | 10 | V | Voltage defined as VDD-VSS | 6 | |
| Minimum operating voltage for 0V charging | Vst | 1.8 | V | Voltage defined as VDD-VSS=0V | 6 | ||
| Output delay of over-charge | tVDET1 | 0.7 | 1 | 1.3 | s | VDD=3.2V to 4.5V, VC-VSS=3.2V | 6 |
| Output delay of release from over-charge | tVREL1 | 11 | 16 | 21 | ms | VDD=4.5V to 3.2V, VC-VSS=3.2V | 6 |
| Output delay of over-discharge | tVDET2 | 89 | 128 | 167 | ms | VDD-VC=3.2V to 1.9V, VC-VSS=3.2V | 6 |
| Output delay of release from over-discharge | tVREL2 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=1.9V to 3.2V, VC-VSS=3.2V | 6 |
| Excess discharge-current threshold | VDET3 | -0.015 | 0.2 | 0.015 | V | Detect rising edge of 'V-' pin voltage | 6 |
| Output delay of excess discharge current | tVDET3 | 8 | 12 | 16 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to 0.5V | 6 |
| Output delay of release from excess discharge-current | tVREL3 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=3V to 0V | 6 |
| Excess charge-current threshold (-0.2V option) | VDET4 | -0.23 | -0.2 | -0.17 | V | Detect falling edge of 'V-' pin voltage | 6 |
| Output delay of excess charge-current | tVDET4 | 5 | 8 | 11 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to -1V | 6 |
| Output delay of release from excess charge-current | tVREL4 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=-1V to 0V | 6 |
| Short protection voltage | Vshort | 0.7 | 1.1 | 1.5 | V | VDD-VC=VC-VSS=3.2V | 6 |
| Output delay of short protection | tshort | 150 | 300 | 500 | µs | VDD-VC=VC-VSS=3.2V, V-=0V to 6.4V | 6 |
| Reset resistance for excess discharge-current protection | Rshort | 25 | 40 | 75 | kΩ | VDD-VC=VC-VSS=3.2V, V-=1V | 6 |
| Delay shortening mode input voltage | VDS | -2.2 | -1.6 | -1 | V | VDD-VC=VC-VSS=4.0V | 6 |
| Nch ON voltage of COUT | VOL1 | 0.4 | 0.5 | V | IOL=50µA, VDD-VC=VC-VSS=4.5V | 6 | |
| Pch ON voltage of COUT | VOH1 | 6.8 | 7.4 | V | IOH=-50µA, VDD-VC=VC-VSS=3.2V | 6 | |
| Nch ON voltage of DOUT | VOL2 | 0.2 | 0.5 | V | IOL=50µA, VDD-VC=VC-VSS=1.9V | 6 | |
| Pch ON voltage of DOUT | VOH2 | 6.8 | 7.4 | V | IOH=-50µA, VDD-VC=VC-VSS=3.2V | 6 | |
| Supply current | IDD | 4 | 8 | µA | VDD-VC=VC-VSS=3.2V, V-=0V | 6 | |
| Standby current | IS | 1.2 | 2 | µA | VDD-VC=VC-VSS=1.9V | 6 | |
| Supply voltage (absolute maximum) | VDD | -0.3 | 12 | V | Ta=25°C, Vss=0V | 5 | |
| Middle pin voltage between 2-cell (absolute maximum) | Vc | -0.3 | 0.3 | V | Printed Vss-0.3 to VDD+0.3 V; min relative to Vss, max relative to VDD | 5 | |
| V- pin voltage (absolute maximum) | V- | -30 | 0.3 | V | Printed VDD-30 to VDD+0.3 V; relative to VDD | 5 | |
| COUT pin voltage (absolute maximum) | VCOUT | -30 | 0.3 | V | Printed VDD-30 to VDD+0.3 V; relative to VDD | 5 | |
| DOUT pin voltage (absolute maximum) | VDOUT | -0.3 | 0.3 | V | Printed Vss-0.3 to VDD+0.3 V; min relative to Vss, max relative to VDD | 5 | |
| Power dissipation (absolute maximum) | PD | 150 | mW | 5 | |||
| Operating temperature (absolute maximum) | Ta | -40 | 85 | °C | 5 | ||
| Storage temperature (absolute maximum) | Tstg | -55 | 125 | °C | 5 |
CAD (KiCad official)
- Symbol:
R5460N208AA-TR-FE - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
r5460n208aa-tr-fe-etched.step/r5460n208aa-tr-fe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r5460n208aa-tr-fe.step/r5460n208aa-tr-fe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Ricoh Elec Devices datasheet (33 pp, sha256
1b26c54b8790b19f, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# R5460N208AA-TR-FE
**Ricoh Elec Devices** · Battery Management · SOT-23-6
R5460N208AA-TR-FE from Ricoh Elec Devices, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DOUT | output | Output pin of the over-discharge and excess discharge-current detectors, CMOS output, switching to L after a fixed internal delay when discharge voltage crosses the detector threshold. |
| 2 | COUT | output | Output pin of the over-charge detector, CMOS output, switching to L after a fixed internal delay when the over-charge threshold is crossed (returns to H on release). |
| 3 | V- | power_in | Charger negative input pin, used for excess charge-current and excess discharge-current detection; the code list gives an excess discharge-current threshold of 0.200 V and an excess charge-current threshold of -0.200 V for version R5460N208AA. |
| 4 | VC | input | Input pin for the center voltage between the two cells. |
| 5 | VDD | power_in | Power supply pin and substrate voltage level of the IC; operating input voltage (VDD-VSS) is 1.5 V to 10.0 V, absolute maximum -0.3 V to 12 V. |
| 6 | VSS | power_in | Ground pin for the IC. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Ricoh Elec Devices |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VDD1 | 1.5 | | 10 | V | Voltage defined as VDD-VSS | 6 |
| Minimum operating voltage for 0V charging | Vst | | | 1.8 | V | Voltage defined as VDD-VSS=0V | 6 |
| Output delay of over-charge | tVDET1 | 0.7 | 1 | 1.3 | s | VDD=3.2V to 4.5V, VC-VSS=3.2V | 6 |
| Output delay of release from over-charge | tVREL1 | 11 | 16 | 21 | ms | VDD=4.5V to 3.2V, VC-VSS=3.2V | 6 |
| Output delay of over-discharge | tVDET2 | 89 | 128 | 167 | ms | VDD-VC=3.2V to 1.9V, VC-VSS=3.2V | 6 |
| Output delay of release from over-discharge | tVREL2 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=1.9V to 3.2V, VC-VSS=3.2V | 6 |
| Excess discharge-current threshold | VDET3 | -0.015 | 0.2 | 0.015 | V | Detect rising edge of 'V-' pin voltage | 6 |
| Output delay of excess discharge current | tVDET3 | 8 | 12 | 16 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to 0.5V | 6 |
| Output delay of release from excess discharge-current | tVREL3 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=3V to 0V | 6 |
| Excess charge-current threshold (-0.2V option) | VDET4 | -0.23 | -0.2 | -0.17 | V | Detect falling edge of 'V-' pin voltage | 6 |
| Output delay of excess charge-current | tVDET4 | 5 | 8 | 11 | ms | VDD-VC=VC-VSS=3.2V, V-=0V to -1V | 6 |
| Output delay of release from excess charge-current | tVREL4 | 0.7 | 1.2 | 1.7 | ms | VDD-VC=VC-VSS=3.2V, V-=-1V to 0V | 6 |
| Short protection voltage | Vshort | 0.7 | 1.1 | 1.5 | V | VDD-VC=VC-VSS=3.2V | 6 |
| Output delay of short protection | tshort | 150 | 300 | 500 | µs | VDD-VC=VC-VSS=3.2V, V-=0V to 6.4V | 6 |
| Reset resistance for excess discharge-current protection | Rshort | 25 | 40 | 75 | kΩ | VDD-VC=VC-VSS=3.2V, V-=1V | 6 |
| Delay shortening mode input voltage | VDS | -2.2 | -1.6 | -1 | V | VDD-VC=VC-VSS=4.0V | 6 |
| Nch ON voltage of COUT | VOL1 | 0.4 | | 0.5 | V | IOL=50µA, VDD-VC=VC-VSS=4.5V | 6 |
| Pch ON voltage of COUT | VOH1 | 6.8 | | 7.4 | V | IOH=-50µA, VDD-VC=VC-VSS=3.2V | 6 |
| Nch ON voltage of DOUT | VOL2 | 0.2 | | 0.5 | V | IOL=50µA, VDD-VC=VC-VSS=1.9V | 6 |
| Pch ON voltage of DOUT | VOH2 | 6.8 | | 7.4 | V | IOH=-50µA, VDD-VC=VC-VSS=3.2V | 6 |
| Supply current | IDD | | 4 | 8 | µA | VDD-VC=VC-VSS=3.2V, V-=0V | 6 |
| Standby current | IS | | 1.2 | 2 | µA | VDD-VC=VC-VSS=1.9V | 6 |
| Supply voltage (absolute maximum) | VDD | -0.3 | | 12 | V | Ta=25°C, Vss=0V | 5 |
| Middle pin voltage between 2-cell (absolute maximum) | Vc | -0.3 | | 0.3 | V | Printed Vss-0.3 to VDD+0.3 V; min relative to Vss, max relative to VDD | 5 |
| V- pin voltage (absolute maximum) | V- | -30 | | 0.3 | V | Printed VDD-30 to VDD+0.3 V; relative to VDD | 5 |
| COUT pin voltage (absolute maximum) | VCOUT | -30 | | 0.3 | V | Printed VDD-30 to VDD+0.3 V; relative to VDD | 5 |
| DOUT pin voltage (absolute maximum) | VDOUT | -0.3 | | 0.3 | V | Printed Vss-0.3 to VDD+0.3 V; min relative to Vss, max relative to VDD | 5 |
| Power dissipation (absolute maximum) | PD | | | 150 | mW | | 5 |
| Operating temperature (absolute maximum) | Ta | -40 | | 85 | °C | | 5 |
| Storage temperature (absolute maximum) | Tstg | -55 | | 125 | °C | | 5 |
## CAD (KiCad official)
- Symbol: `R5460N208AA-TR-FE`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `r5460n208aa-tr-fe-etched.step` / `r5460n208aa-tr-fe-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `r5460n208aa-tr-fe.step` / `r5460n208aa-tr-fe.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Ricoh Elec Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203201309302784) (33 pp, sha256 `1b26c54b8790b19f`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/r5460n208aa-tr-fe-datasheet.pdf)