component
R1154N001C-TR-FE
Public Made by Adomby adom
Nisshinbo Micro Devices Inc. Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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R1154N001C-TR-FE
Nisshinbo Micro Devices Inc. · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
R1154N001C-TR-FE from Nisshinbo Micro Devices Inc., in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Voltage regulator output pin; for the R1154x001C the output is set to 2.5 V reference plus the external divider ratio via ADJ, with 150 mA minimum output current at VIN = VOUT + 2.0 V. |
| 2 | GND | power_in | Ground pin; the package tab is electrically connected to GND (substrate level) and is recommended to be connected to the ground plane or left floating. |
| 3 | VDD | power_in | Input voltage pin; the recommended operating input voltage is a maximum of 24 V, with an absolute maximum VIN of 26 V. |
| 4 | ADJ | input | Reference voltage of the adjustable output pin for the R1154N001C, with a 2.5 V reference set by an external resistor pair R1 and R2 between VOUT and GND. |
| 5 | CE | input | Chip enable pin; a logic high input requires at least 2.1 V up to VIN and a logic low input must be 0.3 V or less, and the level must not be left floating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nisshinbo Micro Devices Inc. |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | 2.45 | 2.5 | 2.55 | V | VIN = VSET + 2.0 V, IOUT = 20 mA | 9 |
| Output Current | IOUT | 140 | mA | VIN = VSET + 2.0 V | 9 | ||
| Supply Current | ISS | 5 | 10 | µA | VIN = VSET + 2.0 V, VCE = VIN | 9 | |
| Standby Current | Istandby | 0.1 | 1 | µA | VIN = 24 V, VCE = 0 V | 9 | |
| Load regulation | ΔVOUT/ΔIOUT | 20 | 50 | mV | VIN = VSET + 2.0 V, 1 mA ≤ IOUT ≤ 40 mA | 9 | |
| Line regulation | ΔVOUT/ΔVIN | 0.05 | 0.2 | %/V | VSET + 1 V ≤ VIN ≤ 24 V, IOUT = 20 mA | 9 | |
| Dropout Voltage | VDIF | 0.2 | 0.4 | V | IOUT = 20 mA | 9 | |
| CE H Input Voltage | VCEH | 2.1 | V | Upper limit printed as VIN | 9 | ||
| CE L Input Voltage | VCEL | 0 | 0.3 | V | 9 | ||
| Short Current Limit | ISC | 45 | mA | VOUT = 0 V | 9 | ||
| Thermal Shutdown Temperature | TTSD | 150 | C | Junction Temperature | 9 | ||
| Thermal Shutdown Released Temperature | TTSR | 125 | C | Junction Temperature | 9 | ||
| Feedback internal resistance | RIC | 17 | MΩ | Ta = 25C, guaranteed by design | 10 | ||
| Input Voltage | VIN | 26 | V | 5 | |||
| Input Voltage (CE Input Pin) | VCE | -0.3 | V | Rating printed as -0.3 to VIN + 0.3 V | 5 | ||
| Output Voltage | VOUT | -0.3 | V | Rating printed as -0.3 to VIN + 0.3 V | 5 | ||
| Output Voltage (ADJ Pin) | VADJ | -0.3 | V | Rating printed as -0.3 to VIN + 0.3 V | 5 | ||
| Output Current | IOUT | 250 | mA | 5 | |||
| Power Dissipation SOT-23-5 | PD | 660 | mW | JEDEC STD. 51-7 Test Land Pattern | 5 | ||
| Junction Temperature Range | Tj | -40 | 125 | C | 5 | ||
| Storage Temperature Range | Tstg | -55 | 125 | C | 5 | ||
| Input Voltage | VIN | 24 | V | 5 | |||
| Operating Temperature Range | Ta | -40 | 105 | °C | 5 | ||
| Thermal Resistance Junction-to-Ambient SOT-23-5 | θja | 150 | °C/W | JEDEC STD. 51-7 Test Land Pattern | 22 | ||
| Thermal Characterization Parameter SOT-23-5 | ψjt | 51 | °C/W | JEDEC STD. 51-7 Test Land Pattern | 22 |
CAD (KiCad official)
- Symbol:
R1154N001C-TR-FE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
r1154n001c-tr-fe-etched.step/r1154n001c-tr-fe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);r1154n001c-tr-fe.step/r1154n001c-tr-fe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nisshinbo Micro Devices Inc. datasheet (26 pp, sha256
2e20a69f0925b103, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).