component
QCPL-7847-000E
Public Made by Adomby adom
Broadcom AVAGO Operational Amplifier, DIP-8-300mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownQCPL-7847-000E
Broadcom AVAGO · Operational Amplifier · DIP-8-300mil
QCPL-7847-000E from Broadcom AVAGO, in a DIP-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Input-side supply voltage, 4.5 V to 5.5 V (5.5 V absolute max). Requires a 0.1 uF bypass capacitor between pins 1 and 4. |
| 2 | VIN+ | input | Positive analog input to the isolation amplifier. Accurate/linear range -200 mV to +200 mV; functional range -2 V to +2 V (referenced to GND1). Typically connected across an external current-sense resistor. |
| 3 | VIN- | input | Negative analog input to the isolation amplifier. Accurate/linear range -200 mV to +200 mV; functional range -2 V to +2 V (referenced to GND1). Typically tied to the low side of the current-sense resistor. |
| 4 | GND1 | power_in | Input-side ground reference. Isolated from GND2 by the optical isolation barrier. |
| 5 | GND2 | power_in | Output-side ground reference. Isolated from GND1 by the optical isolation barrier. |
| 6 | VOUT- | output | Negative differential analog output, referenced to GND2. Combined with VOUT+ produces the isolated differential output proportional to the (VIN+ - VIN-) input. |
| 7 | VOUT+ | output | Positive differential analog output, referenced to GND2. Combined with VOUT- produces the isolated differential output proportional to the (VIN+ - VIN-) input. Absolute range -0.5 V to VDD2+0.5 V. |
| 8 | VDD2 | power_in | Output-side supply voltage, 4.5 V to 5.5 V (5.5 V absolute max). Requires a 0.1 uF bypass capacitor between pins 5 and 8. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | DIP-8-300mil |
| Category | Op-amp/Cmp |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
QCPL-7847-000EQCPL-7847-000E300EQCPL-7847-000E500E
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TS | -55 | 125 | °C | 6 | ||
| Operating Temperature | TA | -40 | 100 | °C | 6 | ||
| Supply Voltage | VDD1, VDD2 | 0 | 5.5 | V | 6 | ||
| Steady-State Input Voltage | VIN+, VIN- | -2 | V | 6 | |||
| 2 Second Transient Input Voltage | VIN+, VIN- | -6 | V | 6 | |||
| Output Voltage | VOUT | -0.5 | V | 6 | |||
| Ambient Operating Temperature | TA | -40 | 85 | °C | 6 | ||
| Supply Voltage | VDD1, VDD2 | 4.5 | 5.5 | V | 6 | ||
| Input Voltage (accurate and linear) | VIN+, VIN- | -200 | 200 | mV | 6 | ||
| Input Voltage (functional) | VIN+, VIN- | -2 | 2 | V | 6 | ||
| Input Offset Voltage | VOS | -2 | 0.3 | 2 | mV | TA = 25°C | 7 |
| Input Offset Voltage over temperature | VOS | -3 | 3 | mV | TA = -40°C to +85°C | 7 | |
| Magnitude of Input Offset Change vs. Temperature | /ΔVOS/ΔTA/ | 3 | 10 | µV/°C | 7 | ||
| Gain (± 5% Tol.) | G | 7.6 | 8 | 8.4 | V/V | -200 mV < VIN+ < 200 mV, TA = 25°C | 7 |
| VOUT 200 mV Nonlinearity | NL200 | 0.0037 | 0.35 | % | -200 mV < VIN+ < 200 mV | 7 | |
| VOUT 100 mV Nonlinearity | NL100 | 0.0027 | 0.2 | % | -100 mV < VIN+ < 100 mV | 7 | |
| Maximum Input Voltage before VOUT Clipping | /VIN+/MAX | 308 | mV | 7 | |||
| Input Supply Current | IDD1 | 10.86 | 15.5 | mA | VIN+ = 400 mV | 7 | |
| Output Supply Current | IDD2 | 11.56 | 15.5 | VIN+ = -400 mV | 7 | ||
| Input Current | IIN+ | -0.5 | 5 | µA | 7 | ||
| Output Common-Mode Voltage | VOCM | 2.2 | 2.545 | 2.8 | V | 7 | |
| VOUT Bandwidth (-3 dB) | BW | 50 | 100 | kHz | VIN+ = 200 mVpk-pk sine wave. | 8 | |
| Common Mode Transient Immunity | CMTI | 10 | 15 | kV/µs | VCM = 1 kV, TA = 25°C | 8 | |
| VIN to VOUT Signal Delay (50 – 10%) | tPD10 | 2.03 | 3.3 | µs | Measured at output of MC34081 on Figure 15. VIN+ = 0 mV to 150 mV step. | 8 | |
| VIN to VOUT Signal Delay (50 – 50%) | tPD50 | 3.47 | 5.6 | µs | Measured at output of MC34081 on Figure 15. VIN+ = 0 mV to 150 mV step. | 8 | |
| VIN to VOUT Signal Delay (50 – 90%) | tPD90 | 4.99 | 9.9 | µs | Measured at output of MC34081 on Figure 15. VIN+ = 0 mV to 150 mV step. | 8 | |
| VOUT Rise/Fall Time (10 – 90%) | tR/F | 2.96 | 6.6 | µs | 8 |
CAD (KiCad official)
- Symbol:
QCPL-7847-000E - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8-300mil (KiCad packages3D, STEP)
- 3D model files:
qcpl-7847-000e-etched.step/qcpl-7847-000e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);qcpl-7847-000e.step/qcpl-7847-000e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom AVAGO datasheet (18 pp, sha256
43bfeec4a87fb237, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).