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QCFJ-3439T-500UE
Public Made by Adomby adom
Broadcom/AVAGO Transistor Output Optocoupler, SO-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownQCFJ-3439T-500UE
Broadcom/AVAGO · Transistor Output Optocoupler · SO-24
QCFJ-3439T-500UE from Broadcom/AVAGO, in a SO-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VEE1 | power_in | Input ground. |
| 2 | /UVLO | output | VCC1 under voltage feedback and VCC2 under voltage lock-out feedback. |
| 3 | /FAULT | output | Desaturation fault feedback. |
| 4 | /GFAULT | output | IGBT/MOSFET gate status feedback. |
| 5 | DNC | unconnected | Do not connect; internally this pin is connected to the VEE1 lead frame. |
| 6 | VCC1 | power_in | Input positive power supply. |
| 7 | NC | unconnected | No connection. |
| 8 | DNC | unconnected | Do not connect; internally connected to the input LED cathode lead frame. |
| 9 | AN | input | Input LED anode. |
| 10 | DNC | unconnected | Do not connect; internally connected to the input LED anode lead frame. |
| 11 | CA | input | Input LED cathode. |
| 12 | NC | unconnected | No connection. |
| 13 | VE | power_in | IGBT emitter/MOSFET source reference. |
| 14 | VEE2 | power_in | Output negative power supply. |
| 15 | VEE2 | power_in | Output negative power supply. |
| 16 | VOUTN | output | Output driver to turn off the IGBT/MOSFET gate. |
| 17 | VOUTP/CLAMP | output | Output driver to turn on the IGBT/MOSFET gate and Miller current clamping output. |
| 18 | VCC2 | power_in | Output positive power supply. |
| 19 | SSD | output | Soft shutdown output driver. |
| 20 | DESAT | input | Desaturation protection sensing input. |
| 21 | DNC | unconnected | Do not connect; internally connected to the LED2+ lead frame. |
| 22 | LED2+(DNC) | unconnected | Do not connect, for testing only. |
| 23 | DNC | unconnected | Do not connect; internally connected to the VEE2 lead frame. |
| 24 | DNC | unconnected | Do not connect; internally connected to the VEE2 lead frame. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom/AVAGO |
| Package | SO-24 |
| Category | Optocoupler |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TS | -55 | 150 | °C | 7 | ||
| Operating Temperature | TA | -40 | 125 | °C | 7 | ||
| IC Junction Temperature | TJ | 150 | °C | 7 | |||
| Average LED Input Current | IF(AVG) | 20 | mA | 7 | |||
| Peak Transient LED Input Current | IF(TRAN) | 1 | A | <1-µs pulse width, 300 pps | 7 | ||
| LED Reverse Input Voltage | VCA, VAN | 6 | V | 7 | |||
| Input Supply Voltage | VCC1 | -0.5 | 6 | V | Reference to VEE1 | 7 | |
| Total Output Supply Voltage | VCC2 | -0.5 | 30 | V | Reference to VEE2 | 7 | |
| Negative Output Supply Voltage | VEE2, VE | -15 | 0.5 | V | 7 | ||
| Peak Output Current for VOUTP and VOUTN | /IOUT(PEAK)/ | 10 | A | Maximum pulse width=5 µs, maximum duty cycle=1% | 7 | ||
| Peak Miller Clamp Sinking Current | ICLAMP(PEAK) | 5 | A | Maximum pulse width=5 µs, maximum duty cycle=1% | 7 | ||
| Desat Discharge Current (Continuous) | IDSCHG | 12 | mA | 7 | |||
| Output IC Power Dissipation | PO | 800 | mW | 7 | |||
| Input IC Power Dissipation | PI | 150 | mW | 7 | |||
| Operating Temperature | TA | -40 | 125 | °C | 8 | ||
| Input IC Supply Voltage | VCC1 | 4.5 | 5.5 | V | 8 | ||
| Total Output IC Supply Voltage | VCC2, VEE2 | 15 | 25 | V | 8 | ||
| Positive Output IC Supply Voltage | VCC2, VE | 15 | 20 | V | 8 | ||
| Negative Output IC Supply Voltage | VEE2, VE | -10 | 0 | V | 8 | ||
| Input LED Turn-on Current | IF(ON) | 11 | 16 | mA | 8 | ||
| Input LED Turn-off Voltage (VAN, VCA) | VF(OFF) | -5.5 | 0.8 | V | 8 | ||
| Input LED Turn On Pulse Width | Ton(LED) | 100 | ns | 8 | |||
| Input Supply Current | ICC1 | 1 | 1.6 | 2.5 | mA | 9 | |
| Output High Supply Current | ICC2H | 4.5 | 6.6 | 8.6 | mA | IF = 11 mA, No load | 9 |
| Output Low Supply Current | ICC2L | 3.5 | 5.6 | 7.5 | mA | IF = 0 mA, No load | 9 |
| Output High VE Supply Current | IEH | -0.4 | -0.7 | -1.2 | mA | IF = 11 mA, No load | 9 |
| Output Low VE Supply Current | IEL | -0.4 | -0.7 | -1.2 | mA | IF = 0 mA, No load | 9 |
| VCC1 Under Voltage Turn On Threshold | VUV1_TH+ | 3.9 | 4.2 | 4.4 | V | 9 | |
| VCC1 Under Voltage Turn Off Threshold | VUV1_TH- | 3.6 | 3.9 | 4.1 | V | 9 | |
| VCC1 MOS Threshold | VCC1_MOS_TH | 0.5 | 1.4 | 1.7 | V | I/UVLO = 0.5 mA | 9 |
| LED Forward Voltage (VAN, VCA) | VF | 1.25 | 1.55 | 1.85 | V | IF = 11 mA | 9 |
| LED Reverse Breakdown Voltage (VCA, VAN) | VBR | 6 | V | IF = -10 µA | 9 | ||
| LED Turn On Current Threshold, Low to High | ITH+ | 2.4 | 7.5 | mA | 9 | ||
| LED Turn On Current Threshold, High to Low | ITH- | 0.3 | 2.1 | mA | 9 | ||
| /UVLO Logic Low Output Voltage | V/UVLO_L | 0.4 | V | I/UVLO = 4 mA | 9 | ||
| /UVLO Logic High Output Current | I/UVLO_H | 0.02 | 2 | µA | V/UVLO = 5V | 9 | |
| /FAULT Logic Low Output Voltage | V/FAULT_L | 0.4 | V | I/FAULT = 4 mA | 9 | ||
| /FAULT Logic High Output Current | I/FAULT_H | 0.02 | 2 | µA | V/FAULT = 5V | 9 | |
| /GFAULT Logic Low Output Voltage | V/GFAULT_L | 0.4 | V | I/GFAULT = 4 mA | 9 | ||
| /GFAULT Logic High Output Current | I/GFAULT_H | 0.02 | 2 | µA | V/GFAULT = 5V | 10 | |
| VOUTN Low Level Voltage | VOUTN_L | 0.01 | 0.03 | 0.1 | V | IO = 100 mA | 10 |
| VOUTP High Level Peak Sourcing Current | IOUTP(PEAK) | -16 | -10 | A | VOUTP = VCC2, 15V | 10 | |
| VOUTN Low Level Peak Sinking Current | IOUTN(PEAK) | 10 | 17 | A | VOUTN = VEE2 + 15V | 10 | |
| VOUTP Output PMOS RDS(ON) | ROUTP | 0.1 | 0.5 | 1.5 | Ω | IO = -100 mA | 10 |
| VOUTN Output NMOS RDS(ON) | ROUTN | 0.1 | 0.3 | 1 | Ω | IO = 100 mA | 10 |
| Low Level SSD Voltage | VSSD | 0.01 | 0.04 | 0.5 | V | ISSD = 40 mA | 10 |
| Low Level SSD Current | ISSD | 1 | A | VSSD = 10V | 10 | ||
| VIN to High Level VOUTP Propagation Delay Time | tPLH | 98 | 140 | ns | VIN = 5V, RLED = 260Ω, Rg_on = 2.2Ω, Rg_off = 2.2Ω, Cload = 2.2 nF, f = 10 kHz, Duty cycle = 50% | 10 | |
| VIN to Low Level VOUTN Propagation Delay Time | tPHL | 95 | 140 | ns | VIN = 5V, RLED = 260Ω, Rg_on = 2.2Ω, Rg_off = 2.2Ω, Cload = 2.2 nF, f = 10 kHz, Duty cycle = 50% | 10 | |
| Pulse Width Distortion | PWD | -60 | 60 | ns | 10 | ||
| Dead Time Distortion (tPLH, tPHL) | DTD | -60 | 60 | ns | 10 | ||
| Output High Level Common Mode Transient Immunity | /CMH/ | 100 | kV/µs | TA = 25°C, VCM = 1000V | 10 | ||
| Output Low Level Common Mode Transient Immunity | /CML/ | 100 | kV/µs | TA = 25°C, VCM = 1000V | 10 | ||
| Clamp Threshold Voltage | VMC_TH | 1.5 | 2 | 2.5 | V | 10 | |
| Clamp Low Level Sinking Current | ICLAMP | 1 | 2.5 | A | VCLAMP = VEE2 + 2.5V | 10 | |
| Clamp Low Level Peak Sinking Current | ICLAMP(PEAK) | 2.5 | 4 | A | VCLAMP = VEE2 + 10V | 10 | |
| VCC2 UVLO Threshold Low to High | VUVLO2_TH+ | 11.25 | 12.9 | 13.75 | V | VOUTP, VE > 5V | 10 |
| VCC2 UVLO Threshold High to Low | VUVLO2_TH- | 10.35 | 11.8 | 12.65 | V | VOUTP, VE < 5V | 10 |
| VCC2 UVLO Hysteresis | VUVLO2_HYS | 0.9 | 1.1 | 1.3 | V | 10 | |
| Input-Output Momentary Withstand Voltage | VISO | 5000 | VRMS | RH < 50%, t = 1 minute, TA = 25°C | 12 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | (pin 1) and the bypass capacitor locally to these planes through multiple via holes. For thermal dissipation purposes, it is recommended to place large copper area for top layer VEE2 (pins 14 and 15) | 26 |
CAD (KiCad official)
- Symbol:
QCFJ-3439T-500UE - Footprint:
Package_SO:SO-24_5.3x15mm_P1.27mm - 3D model: SO-24, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
qcfj-3439t-500ue-etched.step/qcfj-3439t-500ue-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);qcfj-3439t-500ue.step/qcfj-3439t-500ue.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom/AVAGO datasheet (27 pp, sha256
cdb732fece3f4a6b, retrieved 2026-10-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).