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PY32F003L16S6TU

Public Made by Adom

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PUYA Microcontrollers (MCU/MPU/SOC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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PY32F003L16S6TU

PUYA · Microcontrollers (MCU/MPU/SOC) · SOP-8

PY32F003L16S6TU from PUYA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Digital power supply, 1.7V to 5.5V operating range.
2 PA0 bidirectional General-purpose I/O (COM 5V-type port) with USART1_CTS, COMP1_OUT, TIM1_CH3, TIM1_CH1N, SPI1_MISO, IR_OUT alternate functions and ADC_IN0, COMP1_INM additional functions.
3 PA1 bidirectional General-purpose I/O (COM port) with SPI1_SCK, USART1_RTS, EVENTOUT, SPI1_MOSI, TIM1_CH4, TIM1_CH2N, MCO alternate functions and ADC_IN1, COMP1_INP additional functions.
4 PA2 bidirectional General-purpose I/O (COM port) with SPI1_MOSI, USART1_TX, SPI1_SCK, TIM3_CH1, I2C_SDA alternate functions and ADC_IN2 additional function.
5 PF2-NRST / PB0 bidirectional PF2 or NRST (reset port with internal weak pull-up, selected via option bytes; MCO alternate function) shared with PB0 (SPI1_NSS, TIM3_CH3, TIM1_CH2N, EVENTOUT, COMP1_OUT, ADC_IN8); only one of the two IOs usable at a time, the other must be in analog mode.
6 PA10 / PA13(SWDIO) bidirectional PA10 (USART1_RX, TIM1_CH3, TIM17_BKIN, I2C_SDA, I2C_SCL, SPI1_NSS, USART1_TX, IR_OUT, EVENTOUT) shared with PA13 SWDIO (internal pull-up active after reset; IR_OUT, SPI1_MISO, TIM1_CH2, USART1_RX, MCO); only one IO usable at a time.
7 PA14(SWCLK) / PB5 bidirectional PA14 SWCLK (internal pull-down active after reset; USART1_TX, EVENTOUT, MCO) shared with PB5 (SPI1_MOSI, TIM3_CH2, TIM16_BKIN, USART1_CK, LPTIM_IN1, COMP1_OUT); only one IO usable at a time.
8 GND power_in Ground pin; the pin table lists pin 8 as 'VCC' but the pinout figure shows a GND pin.

Key specifications

Parameter Value
Manufacturer PUYA
Package SOP-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage VCC -0.3 6.25 V 25
Input voltage on other pins VIN -0.3 V 25
Total current into VCC pin (supply current) IVCC 100 mA 25
Total current out of VSS pin (sink current) IVSS 100 mA 25
COM IO output sink current IIO(PIN) 20 mA 25
Total source current, all IO -20 mA 25
Storage temperature range TSTG -65 150 ℃ 25
Operating temperature range TO -40 85 ℃ 25
Internal AHB clock frequency fHCLK 0 24 MHz 26
Internal APB clock frequency fPCLK 0 24 MHz 26
Standard operating voltage VCC 1.7 5.5 V 26
IO input voltage VIN -0.3 V 26
Ambient temperature TA -40 85 ℃ 26
Junction temperature TJ -40 90 ℃ 26
VCC rise rate tVCC 0 us/V 26
VCC fall rate 20 us/V 26
Reset timeout time tRSTTEMPO 4 7.5 ms 26
POR/PDR reset threshold, rising edge VPOR/PDR 1.5 1.6 1.7 V 26
POR/PDR reset threshold, falling edge VPOR/PDR 1.45 1.55 1.65 V 26
BOR threshold 1, rising edge VBOR1 1.7 1.8 1.9 V 26
BOR threshold 1, falling edge VBOR1 1.6 1.7 1.8 V 26
BOR threshold 2, rising edge VBOR2 1.9 2 2.1 V 26
BOR threshold 2, falling edge VBOR2 1.8 1.9 2 V 26
BOR threshold 3, rising edge VBOR3 2.1 2.2 2.3 V 26
BOR threshold 3, falling edge VBOR3 2 2.1 2.2 V 26
BOR threshold 4, rising edge VBOR4 2.3 2.4 2.5 V 26
BOR threshold 4, falling edge VBOR4 2.2 2.3 2.4 V 26
BOR threshold 5, rising edge VBOR5 2.5 2.6 2.7 V 26
BOR threshold 5, falling edge VBOR5 2.4 2.5 2.6 V 26
BOR threshold 6, rising edge VBOR6 2.7 2.8 2.9 V 26
BOR threshold 6, falling edge VBOR6 2.6 2.7 2.8 V 26
BOR threshold 7, rising edge VBOR7 2.9 3 3.1 V 26
BOR threshold 7, falling edge VBOR7 2.8 2.9 3 V 26
BOR threshold 8, rising edge VBOR8 3.1 3.2 3.3 V 26
BOR threshold 8, falling edge VBOR8 3 3.1 3.2 V 26
ADC conversion clock frequency FADC 1 4 6 MHz VCC=1.7~2.3V 31
ADC conversion clock frequency FADC 1 8 12 MHz VCC=2.3~5.5V 31
ADC differential nonlinearity DNL -2 2 LSB 31
ADC integral nonlinearity INL -3 3 LSB 31
ADC offset Offset -2 2 LSB 31
Pull-up resistor RPU 30 50 70 kꭥ 31
Pull-down resistor RPD 30 50 70 kꭥ 31
Average slope of temperature sensor Avg_Slope 2.3 2.5 2.7 mV/℃ 32
Voltage at 30℃(±5℃) V30 0.742 0.76 0.785 V 32
Internal reference voltage VREFINT 1.17 1.2 1.23 V 32
LPTIM minimum/maximum overflow, prescaler /1 0.0305 1998.85 ms PRESC[2:0]=0, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /2 0.061 3997.7 ms PRESC[2:0]=1, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /4 0.1221 8001.95 ms PRESC[2:0]=2, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /8 0.2441 15997.3 ms PRESC[2:0]=3, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /16 0.4883 32001.2 ms PRESC[2:0]=4, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /32 0.9766 64002.5 ms PRESC[2:0]=5, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /64 1.9531 127998 ms PRESC[2:0]=6, LSI clock 33
LPTIM minimum/maximum overflow, prescaler /128 3.9063 256003 ms PRESC[2:0]=7, LSI clock 33
IWDG minimum/maximum overflow, prescaler /4 0.122 499.712 ms PR[2:0]=0, LSI clock 33
IWDG minimum/maximum overflow, prescaler /8 0.244 999.424 ms PR[2:0]=1, LSI clock 33
IWDG minimum/maximum overflow, prescaler /16 0.488 1998.85 ms PR[2:0]=2, LSI clock 33
IWDG minimum/maximum overflow, prescaler /32 0.976 3997.7 ms PR[2:0]=3, LSI clock 33
IWDG minimum/maximum overflow, prescaler /64 1.952 7995.39 ms PR[2:0]=4, LSI clock 33
IWDG minimum/maximum overflow, prescaler /128 3.904 15990.8 ms PR[2:0]=5, LSI clock 33
IWDG minimum/maximum overflow, prescaler /256 7.808 31981.6 ms PR[2:0]=6 or 7, LSI clock 33

CAD (KiCad official)

  • Symbol: PY32F003L16S6TU
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: py32f003l16s6tu-etched.step / py32f003l16s6tu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); py32f003l16s6tu.step / py32f003l16s6tu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PUYA datasheet (39 pp, sha256 a4f4303cf7c19726, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF