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PY32F003F14P6TU
Public Made by Adomby adom
PUYA Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PY32F003F14P6TU
PUYA · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
PY32F003F14P6TU from PUYA, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA2 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions listed for it include SPI1_MOSI, COMP2_INM, ADC_IN2, USART1_TX, USART2_TX, LPUART_TX and COMP2_OUT, and all ports float as inputs during and after reset. |
| 2 | PA3 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN3, COMP2_INP, USART1_RX, USART2_RX, SPI1_MOSI, TIM1_CH1, I2C_SCL and EVENTOUT. |
| 3 | PA4 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN4, SPI1_NSS, USART1_CK, USART2_CK, TIM14_CH1, RTC_OUT and TIM3_CH3. |
| 4 | PA5 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN5, SPI1_SCK, LPTIM_ETR, EVENTOUT, TIM3_CH2, USART2_RX and MCO. |
| 5 | PA6 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN6, SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, LPUART_CTS, COMP1_OUT, USART1_CK and RTC_OUT. |
| 6 | PA7 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN7, SPI1_MOSI, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, COMP2_OUT, USART1_TX, USART2_TX, I2C_SDA and SPI1_MISO. |
| 7 | VSS | power_in | Ground pin (all voltages are referenced to VSS per section 6.1). |
| 8 | PA12 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 9 | VCC | power_in | Digital power supply; the standard operating voltage range is 1.7 V to 5.5 V. |
| 10 | PA13 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 11 | PA14 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 12 | PB5 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 13 | PB6 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 14 | PB7 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; the PVD can monitor the voltage on PB7 according to section 3.5.2.3. |
| 15 | PF4-BOOT0 | bidirectional | Port F GPIO with BOOT0 function placed at this position in the TSSOP20 pinout figure; the boot mode details (section 3.3) are not in the provided pages. |
| 16 | PF0-OSC_IN | bidirectional | COM-type port used as the HSE oscillator input OSC_IN for a 4 to 32 MHz crystal or resonator; alternate functions include USART2_RX, TIM14_CH1, USART1_RX, USART2_TX and I2C_SDA. |
| 17 | PF1-OSC_OUT | bidirectional | COM-type port used as the HSE oscillator output OSC_OUT for a 4 to 32 MHz crystal or resonator; alternate functions include USART2_TX, USART1_TX, USART2_RX, I2C_SCL, SPI1_NSS and TIM14_CH1. |
| 18 | PF2-NRST | bidirectional | Reset-type port (not analog-capable) with an internal weak pull-up of 30 to 70 kΩ (typ. 50 kΩ), used as the NRST reset input and also providing MCO and USART2_RX functions. |
| 19 | PA0 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN0, COMP1_INM, USART1_CTS, USART2_CTS, COMP1_OUT, TIM1_CH3, TIM1_CH1N, SPI1_MISO, USART2_TX and IR_OUT. |
| 20 | PA1 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN1, COMP1_INP, SPI1_SCK, SPI1_MOSI, USART1_RTS, USART2_RTS, USART2_RX, TIM1_CH4, TIM1_CH2N, MCO and EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PUYA |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute max VCC external main supply voltage | VCC | -0.3 | 6.25 | V | 26 | ||
| Input voltage on other pins | VIN | -0.3 | V | 26 | |||
| Total current into VCC pin (supply current) | IVCC | 100 | mA | 26 | |||
| Total current out of VSS pin (sink current) | IVSS | 100 | mA | 26 | |||
| COM IO output sink current | IIO(PIN) | 20 | mA | 26 | |||
| Total source current, all IO | -20 | mA | 26 | ||||
| Storage temperature range | TSTG | -65 | 150 | ℃ | 26 | ||
| Operating temperature range | TO | -40 | 85 | ℃ | 26 | ||
| Internal AHB clock frequency | fHCLK | 0 | 32 | MHz | 27 | ||
| Internal APB clock frequency | fPCLK | 0 | 32 | MHz | 27 | ||
| Standard operating voltage | VCC | 1.7 | 5.5 | V | 27 | ||
| IO input voltage | VIN | -0.3 | V | 27 | |||
| Ambient temperature | TA | -40 | 85 | ℃ | 27 | ||
| Junction temperature | TJ | -40 | 90 | ℃ | 27 | ||
| VCC rise rate | tVCC | 0 | us/V | 27 | |||
| VCC fall rate | 20 | us/V | 27 | ||||
| Reset temporization time | tRSTTEMPO | 4 | 7.5 | ms | 27 | ||
| POR/PDR reset threshold, rising edge | VPOR/PDR | 1.5 | 1.6 | 1.7 | V | 27 | |
| POR/PDR reset threshold, falling edge | VPOR/PDR | 1.45 | 1.55 | 1.65 | V | 27 | |
| BOR threshold 1, rising edge | VBOR1 | 1.7 | 1.8 | 1.9 | V | 27 | |
| BOR threshold 1, falling edge | VBOR1 | 1.6 | 1.7 | 1.8 | V | 27 | |
| BOR threshold 2, rising edge | VBOR2 | 1.9 | 2 | 2.1 | V | 27 | |
| BOR threshold 2, falling edge | VBOR2 | 1.8 | 1.9 | 2 | V | 27 | |
| BOR threshold 3, rising edge | VBOR3 | 2.1 | 2.2 | 2.3 | V | 27 | |
| BOR threshold 3, falling edge | VBOR3 | 2 | 2.1 | 2.2 | V | 27 | |
| BOR threshold 4, rising edge | VBOR4 | 2.3 | 2.4 | 2.5 | V | 27 | |
| BOR threshold 4, falling edge | VBOR4 | 2.2 | 2.3 | 2.4 | V | 27 | |
| BOR threshold 5, rising edge | VBOR5 | 2.5 | 2.6 | 2.7 | V | 27 | |
| BOR threshold 5, falling edge | VBOR5 | 2.4 | 2.5 | 2.6 | V | 27 | |
| BOR threshold 6, rising edge | VBOR6 | 2.7 | 2.8 | 2.9 | V | 27 | |
| BOR threshold 6, falling edge | VBOR6 | 2.6 | 2.7 | 2.8 | V | 27 | |
| BOR threshold 7, rising edge | VBOR7 | 2.9 | 3 | 3.1 | V | 27 | |
| BOR threshold 7, falling edge | VBOR7 | 2.8 | 2.9 | 3 | V | 27 | |
| BOR threshold 8, rising edge | VBOR8 | 3.1 | 3.2 | 3.3 | V | 27 | |
| BOR threshold 8, falling edge | VBOR8 | 3 | 3.1 | 3.2 | V | 27 |
CAD (KiCad official)
- Symbol:
PY32F003F14P6TU - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
py32f003f14p6tu-etched.step/py32f003f14p6tu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);py32f003f14p6tu.step/py32f003f14p6tu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PUYA datasheet (43 pp, sha256
c1a03b8b328379d1, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PY32F003F14P6TU
**PUYA** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
PY32F003F14P6TU from PUYA, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA2 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions listed for it include SPI1_MOSI, COMP2_INM, ADC_IN2, USART1_TX, USART2_TX, LPUART_TX and COMP2_OUT, and all ports float as inputs during and after reset. |
| 2 | PA3 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN3, COMP2_INP, USART1_RX, USART2_RX, SPI1_MOSI, TIM1_CH1, I2C_SCL and EVENTOUT. |
| 3 | PA4 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN4, SPI1_NSS, USART1_CK, USART2_CK, TIM14_CH1, RTC_OUT and TIM3_CH3. |
| 4 | PA5 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN5, SPI1_SCK, LPTIM_ETR, EVENTOUT, TIM3_CH2, USART2_RX and MCO. |
| 5 | PA6 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN6, SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, LPUART_CTS, COMP1_OUT, USART1_CK and RTC_OUT. |
| 6 | PA7 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN7, SPI1_MOSI, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, COMP2_OUT, USART1_TX, USART2_TX, I2C_SDA and SPI1_MISO. |
| 7 | VSS | power_in | Ground pin (all voltages are referenced to VSS per section 6.1). |
| 8 | PA12 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 9 | VCC | power_in | Digital power supply; the standard operating voltage range is 1.7 V to 5.5 V. |
| 10 | PA13 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 11 | PA14 | bidirectional | Port A GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 12 | PB5 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 13 | PB6 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; its alternate-function list is not in the provided pages. |
| 14 | PB7 | bidirectional | Port B GPIO placed at this position in the TSSOP20 pinout figure; the PVD can monitor the voltage on PB7 according to section 3.5.2.3. |
| 15 | PF4-BOOT0 | bidirectional | Port F GPIO with BOOT0 function placed at this position in the TSSOP20 pinout figure; the boot mode details (section 3.3) are not in the provided pages. |
| 16 | PF0-OSC_IN | bidirectional | COM-type port used as the HSE oscillator input OSC_IN for a 4 to 32 MHz crystal or resonator; alternate functions include USART2_RX, TIM14_CH1, USART1_RX, USART2_TX and I2C_SDA. |
| 17 | PF1-OSC_OUT | bidirectional | COM-type port used as the HSE oscillator output OSC_OUT for a 4 to 32 MHz crystal or resonator; alternate functions include USART2_TX, USART1_TX, USART2_RX, I2C_SCL, SPI1_NSS and TIM14_CH1. |
| 18 | PF2-NRST | bidirectional | Reset-type port (not analog-capable) with an internal weak pull-up of 30 to 70 kΩ (typ. 50 kΩ), used as the NRST reset input and also providing MCO and USART2_RX functions. |
| 19 | PA0 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN0, COMP1_INM, USART1_CTS, USART2_CTS, COMP1_OUT, TIM1_CH3, TIM1_CH1N, SPI1_MISO, USART2_TX and IR_OUT. |
| 20 | PA1 | bidirectional | COM-type 5V port that supports analog I/O; alternate functions include ADC_IN1, COMP1_INP, SPI1_SCK, SPI1_MOSI, USART1_RTS, USART2_RTS, USART2_RX, TIM1_CH4, TIM1_CH2N, MCO and EVENTOUT. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PUYA |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute max VCC external main supply voltage | VCC | -0.3 | | 6.25 | V | | 26 |
| Input voltage on other pins | VIN | -0.3 | | | V | | 26 |
| Total current into VCC pin (supply current) | IVCC | | | 100 | mA | | 26 |
| Total current out of VSS pin (sink current) | IVSS | | | 100 | mA | | 26 |
| COM IO output sink current | IIO(PIN) | | | 20 | mA | | 26 |
| Total source current, all IO | | | | -20 | mA | | 26 |
| Storage temperature range | TSTG | -65 | | 150 | ℃ | | 26 |
| Operating temperature range | TO | -40 | | 85 | ℃ | | 26 |
| Internal AHB clock frequency | fHCLK | 0 | | 32 | MHz | | 27 |
| Internal APB clock frequency | fPCLK | 0 | | 32 | MHz | | 27 |
| Standard operating voltage | VCC | 1.7 | | 5.5 | V | | 27 |
| IO input voltage | VIN | -0.3 | | | V | | 27 |
| Ambient temperature | TA | -40 | | 85 | ℃ | | 27 |
| Junction temperature | TJ | -40 | | 90 | ℃ | | 27 |
| VCC rise rate | tVCC | 0 | | | us/V | | 27 |
| VCC fall rate | | 20 | | | us/V | | 27 |
| Reset temporization time | tRSTTEMPO | | 4 | 7.5 | ms | | 27 |
| POR/PDR reset threshold, rising edge | VPOR/PDR | 1.5 | 1.6 | 1.7 | V | | 27 |
| POR/PDR reset threshold, falling edge | VPOR/PDR | 1.45 | 1.55 | 1.65 | V | | 27 |
| BOR threshold 1, rising edge | VBOR1 | 1.7 | 1.8 | 1.9 | V | | 27 |
| BOR threshold 1, falling edge | VBOR1 | 1.6 | 1.7 | 1.8 | V | | 27 |
| BOR threshold 2, rising edge | VBOR2 | 1.9 | 2 | 2.1 | V | | 27 |
| BOR threshold 2, falling edge | VBOR2 | 1.8 | 1.9 | 2 | V | | 27 |
| BOR threshold 3, rising edge | VBOR3 | 2.1 | 2.2 | 2.3 | V | | 27 |
| BOR threshold 3, falling edge | VBOR3 | 2 | 2.1 | 2.2 | V | | 27 |
| BOR threshold 4, rising edge | VBOR4 | 2.3 | 2.4 | 2.5 | V | | 27 |
| BOR threshold 4, falling edge | VBOR4 | 2.2 | 2.3 | 2.4 | V | | 27 |
| BOR threshold 5, rising edge | VBOR5 | 2.5 | 2.6 | 2.7 | V | | 27 |
| BOR threshold 5, falling edge | VBOR5 | 2.4 | 2.5 | 2.6 | V | | 27 |
| BOR threshold 6, rising edge | VBOR6 | 2.7 | 2.8 | 2.9 | V | | 27 |
| BOR threshold 6, falling edge | VBOR6 | 2.6 | 2.7 | 2.8 | V | | 27 |
| BOR threshold 7, rising edge | VBOR7 | 2.9 | 3 | 3.1 | V | | 27 |
| BOR threshold 7, falling edge | VBOR7 | 2.8 | 2.9 | 3 | V | | 27 |
| BOR threshold 8, rising edge | VBOR8 | 3.1 | 3.2 | 3.3 | V | | 27 |
| BOR threshold 8, falling edge | VBOR8 | 3 | 3.1 | 3.2 | V | | 27 |
## CAD (KiCad official)
- Symbol: `PY32F003F14P6TU`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `py32f003f14p6tu-etched.step` / `py32f003f14p6tu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `py32f003f14p6tu.step` / `py32f003f14p6tu.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PUYA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834372309147649) (43 pp, sha256 `c1a03b8b328379d1`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/py32f003f14p6tu-datasheet.pdf)