component
PY25Q128HA-SUH-IR
Public Made by Adomby adom
PUYA NOR FLASH, SOP-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
py25q128ha-suh-ir: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
9ae58ec
18h ago
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{
"schema_version": 1,
"type": "component",
"slug": "py25q128ha-suh-ir",
"title": "PY25Q128HA-SUH-IR",
"brief": "PUYA NOR FLASH, SOP-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"memory",
"py25q128ha-suh-ir"
],
"component": {
"mpn": "PY25Q128HA-SUH-IR",
"manufacturer": "PUYA",
"package": "SOP-8-208mil",
"pin_count": 8,
"category": "Memory",
"subcategory": "NOR FLASH",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2406051449_PUYA--PY25Q128HA-SUH-IR_C5354566.pdf",
"parts": {
"symbol": "py25q128ha-suh-ir.kicad_sym",
"footprint": "py25q128ha-suh-ir.kicad_mod",
"model_3d": "py25q128ha-suh-ir-etched.glb",
"model_3d_plain": "py25q128ha-suh-ir.glb",
"model_3d_step": "py25q128ha-suh-ir-etched.step",
"model_3d_step_plain": "py25q128ha-suh-ir.step",
"lbr": "py25q128ha-suh-ir.lbr"
},
"distributor_links": {
"lcsc": "C5354566"
},
"pins": [
{
"number": "1",
"name": "CS#",
"type": "input",
"description": "Active-low chip select. Drive low to select the device for an SPI/QSPI transaction; when high the device is deselected, SO is high-Z and the part enters standby (I_SB typ 15 uA)."
},
{
"number": "2",
"name": "SO/SIO1",
"type": "bidirectional",
"description": "Serial data output in Standard SPI (single-bit read/write); becomes bidirectional IO1 in Dual/Quad SPI, QPI and DTR modes. Push-pull CMOS driver, V_OH >= VCC-0.2 V at -100 uA."
},
{
"number": "3",
"name": "WP#/SIO2",
"type": "bidirectional",
"description": "Active-low write protect input in Standard/Dual SPI modes; enables hardware protection of the status register when combined with the SRP bits. Becomes bidirectional IO2 in Quad SPI / QPI / DTR read modes."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Device ground. Tie to the system 0 V reference."
},
{
"number": "5",
"name": "SI/SIO0",
"type": "bidirectional",
"description": "Serial data input in Standard SPI (receives opcodes, addresses and data on SCLK rising edges); becomes bidirectional IO0 in Dual/Quad SPI, QPI and DTR modes. CMOS input, V_IH >= 0.7*VCC."
},
{
"number": "6",
"name": "SCLK",
"type": "input",
"description": "Serial interface clock input. Data on SI/IOn is latched on rising edges and output on SO/IOn on falling edges (SPI modes 0 and 3). Max 133 MHz for STR Quad read, 66 MHz for DTR."
},
{
"number": "7",
"name": "HOLD#/RESET#/SIO3",
"type": "bidirectional",
"description": "Active-low HOLD# input pauses the current transaction without deselecting the device; can be reconfigured as an active-low hardware RESET# input, or as bidirectional IO3 in Quad SPI / QPI / DTR read modes."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Core and I/O supply, 2.7 V to 3.6 V. Bypass locally with a 100 nF ceramic capacitor to GND. Read current typ 3-10.5 mA depending on frequency/mode; standby typ 15 uA; deep-power-down typ 1 uA."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2406051449_PUYA--PY25Q128HA-SUH-IR_C5354566.pdf",
"pages": 109,
"sha256": "469dc5e359657a00",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "py25q128ha-suh-ir.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "py25q128ha-suh-ir-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "0ee335572a56d70e12e38bb59ef1a6421072c60c7616495f228d0c7aab5c46eb",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "PUYA",
"Package": "SOP-8-208mil",
"Category": "Memory",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"py25q128ha-suh-ir"
],
"discovery_pitch": "PY25Q128HA-SUH-IR (PUYA) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"py25q128ha-suh-ir.kicad_sym",
"py25q128ha-suh-ir.kicad_mod",
"py25q128ha-suh-ir.glb",
"py25q128ha-suh-ir.step",
"py25q128ha-suh-ir-etched.step",
"py25q128ha-suh-ir.lbr",
"docs/hero.png",
"docs/py25q128ha-suh-ir-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "PY25Q128HA-SUH-IT",
"kind": "unknown"
},
{
"mpn": "PY25Q128HA-SUH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSUY-IT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSUY-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IY",
"kind": "unknown"
},
{
"mpn": "PY25Q128HA-SUH-IRSUY-IY",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-KT",
"kind": "unknown"
},
{
"mpn": "PY25Q128HA-SUH-KR",
"kind": "unknown"
},
{
"mpn": "PY25Q128HA-SUH-KY",
"kind": "unknown"
},
{
"mpn": "PY25Q128HA-SUH-IRSSH-IT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSSH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSSH-KT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSSH-KR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMH-IT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMY-IT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMY-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMH-KT",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRSMH-KR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRWXH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRWXY-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRWZH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRQVH-IR",
"kind": "packaging"
},
{
"mpn": "PY25Q128HA-SUH-IRDFH-IR",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T04:37:13.747Z"
}