component
PXT8050
Public Made by Adomby adom
FOSAN Bipolar (BJT), SOT-89-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PXT8050
FOSAN · Bipolar (BJT) · SOT-89-3L
PXT8050 from FOSAN, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Base of the NPN transistor; VEBO max 5 V, BVEBO min 5 V at IE=100uA. |
| 2 | C | passive | Collector of the NPN transistor (also connected to the tab in the package drawing); VCBO 40 V, VCEO 25 V, IC max 1500 mA. |
| 3 | E | passive | Emitter of the NPN transistor; power dissipation 500 mW at Ta=25℃. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FOSAN |
| Package | SOT-89-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
PXT8050 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files:
pxt8050-etched.step/pxt8050-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pxt8050.step/pxt8050.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FOSAN datasheet (4 pp, sha256
c46da7f852254133, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PXT8050
**FOSAN** · Bipolar (BJT) · SOT-89-3L
PXT8050 from FOSAN, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Base of the NPN transistor; VEBO max 5 V, BVEBO min 5 V at IE=100uA. |
| 2 | C | passive | Collector of the NPN transistor (also connected to the tab in the package drawing); VCBO 40 V, VCEO 25 V, IC max 1500 mA. |
| 3 | E | passive | Emitter of the NPN transistor; power dissipation 500 mW at Ta=25℃. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FOSAN |
| Package | SOT-89-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `PXT8050`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files: `pxt8050-etched.step` / `pxt8050-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pxt8050.step` / `pxt8050.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [FOSAN datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757316826814791680) (4 pp, sha256 `c46da7f852254133`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pxt8050-datasheet.pdf)