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Ray Publish 0.1.0 22a8b6e 7d ago

PXT8050-JSM

JSMSEMI · Bipolar (BJT) · SOT-89

PXT8050-JSM from JSMSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base of the NPN transistor; VEBO max 6 V, V(BR)EBO min 5 V at IE=100µA, VBE max 1 V at VCE=1V, IC=10mA.
2 COLLECTOR passive Collector of the NPN transistor; VCBO 40 V, VCEO 25 V, continuous IC 1.5 A, VCE(sat) max 0.5 V at IC=800mA, IB=80mA.
3 EMITTER passive Emitter of the NPN transistor; reference terminal for the VCE and VBE ratings, with power dissipation PC of 0.5 W.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-89
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: PXT8050-JSM
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: pxt8050-jsm-etched.step / pxt8050-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pxt8050-jsm.step / pxt8050-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (3 pp, sha256 8d4e700bb3e7db87, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF