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PUMH17

Nexperia · Digital Transistors · SOT-363

PUMH17 from Nexperia, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND1 power_in Emitter of TR1 (GND1 in Table 2), the ground reference for the first NPN transistor with built-in bias resistors.
2 I1 input Input (base) of TR1 through bias resistor R1 = 47 kΩ (33 to 61 kΩ); input voltage limited to -10 V to 40 V.
3 O2 output Output (collector) of TR2; collector-emitter voltage limited to 50 V and output current limited to 100 mA.
4 GND2 power_in Emitter of TR2 (GND2 in Table 2), the ground reference for the second NPN transistor with built-in bias resistors.
5 I2 input Input (base) of TR2 through bias resistor R1 = 47 kΩ (33 to 61 kΩ); input voltage limited to -10 V to 40 V.
6 O1 output Output (collector) of TR1; collector-emitter voltage limited to 50 V and output current limited to 100 mA.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-363
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base voltage VCBO 50 V open emitter 3
Collector-emitter voltage VCEO 50 V open base 3
Emitter-base voltage VEBO 10 V open collector 3
Input voltage VI -10 40 V 3
Output current IO 100 mA 3
Peak collector current ICM 100 mA 3
Total power dissipation (per transistor) Ptot 200 mW Tamb ≤ 25 °C; device on FR4 PCB, single-sided copper, standard footprint [1] 3
Total power dissipation (per device) Ptot 300 mW Tamb ≤ 25 °C; device on FR4 PCB, single-sided copper, standard footprint [1] 3
Junction temperature Tj 150 °C 3
Ambient temperature Tamb -65 150 °C 3
Storage temperature Tstg -65 150 °C 3
Thermal resistance from junction to ambient (per transistor) Rth(j-a) 625 K/W in free air; device on FR4 PCB, single-sided copper, standard footprint [1] 3
Thermal resistance from junction to ambient (per device) Rth(j-a) 416 K/W in free air; device on FR4 PCB, single-sided copper, standard footprint [1] 3
Collector-base breakdown voltage V(BR)CBO 50 V IC = 100 µA; IE = 0 A; Tamb = 25 °C 4
Collector-emitter breakdown voltage V(BR)CEO 50 V IC = 2 mA; IB = 0 A; Tamb = 25 °C 4
Collector-base cut-off current ICBO 100 nA VCB = 50 V; IE = 0 A; Tamb = 25 °C 4
Collector-emitter cut-off current ICEO 100 nA VCE = 30 V; IB = 0 A; Tamb = 25 °C 4
Collector-emitter cut-off current ICEO 5 µA VCE = 30 V; IB = 0 A; Tj = 150 °C 4
Emitter-base cut-off current IEBO 110 µA VEB = 5 V; IC = 0 A; Tamb = 25 °C 4
DC current gain hFE 60 VCE = 5 V; IC = 5 mA; Tamb = 25 °C 4
Collector-emitter saturation voltage VCEsat 150 mV IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C 4
Off-state input voltage VI(off) 1.7 1.2 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 4
On-state input voltage VI(on) 4 2.7 V VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C 4
Bias resistor 1 (input) R1 33 47 61 kΩ 4
Bias resistor ratio R2/R1 0.37 0.47 0.57 4
Collector capacitance Cc 2.5 pF VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 4

CAD (KiCad official)

  • Symbol: PUMH17
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: pumh17-etched.step / pumh17-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pumh17.step / pumh17.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (9 pp, sha256 fd473bff43120fb1, retrieved 2026-10-19, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF