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PUMD16

Nexperia · Digital Transistors · SOT-363

PUMD16 from Nexperia, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND1 power_in Ground pin, connected to the emitter of TR1 (NPN) in the PUMD16 resistor-equipped double transistor.
2 I1 input Input pin connected to the base of TR1 (NPN) through bias resistor R1 = 22 kΩ; TR1 input voltage is limited to -7 V to 40 V.
3 O2 output Output pin connected to the collector of TR2 (PNP); limited to 50 V VCEO and 100 mA output current (PNP negative polarity).
4 GND2 power_in Ground pin, connected to the emitter of TR2 (PNP) in the PUMD16 resistor-equipped double transistor.
5 I2 input Input pin connected to the base of TR2 (PNP) through bias resistor R1 = 22 kΩ; TR2 input voltage is limited to -40 V to 7 V.
6 O1 output Output pin connected to the collector of TR1 (NPN); limited to 50 V VCEO and 100 mA output current.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-363
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base breakdown voltage V(BR)CBO 50 V IC = 100 µA; IE = 0 A; Tamb = 25 °C 4
Collector-emitter breakdown voltage V(BR)CEO 50 V IC = 2 mA; IB = 0 A; Tamb = 25 °C 4
Collector-base cut-off current ICBO 100 nA VCB = 50 V; IE = 0 A; Tamb = 25 °C 4
Collector-emitter cut-off current ICEO 100 nA VCE = 30 V; IB = 0 A; Tamb = 25 °C 4
Collector-emitter cut-off current ICEO 5 µA VCE = 30 V; IB = 0 A; Tj = 150 °C 4
Emitter-base cut-off current IEBO 120 µA VEB = 5 V; IC = 0 A; Tamb = 25 °C 4
DC current gain hFE 80 VCE = 5 V; IC = 5 mA; Tamb = 25 °C 4
Collector-emitter saturation voltage VCEsat 150 mV IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C 4
Off-state input voltage VI(off) 0.8 0.5 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 4
On-state input voltage VI(on) 2 1.1 V VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C 4
Bias resistor 1 (input) R1 15.4 22 28.6 kΩ See section Test information for resistor calculation and test conditions 4
Bias resistor ratio R2/R1 1.7 2.1 2.6 See section Test information for resistor calculation and test conditions 4
TR1 (NPN) collector capacitance Cc 2.5 pF VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 4
TR2 (PNP) collector capacitance Cc 3 pF VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 4
Collector-base voltage VCBO 50 V open emitter 3
Collector-emitter voltage VCEO 50 V open base 3
Emitter-base voltage VEBO 5 V open collector 3
Input voltage TR1 (NPN) VI -7 40 V TR1 (NPN) 3
Input voltage TR2 (PNP) VI -40 7 V TR2 (PNP) 3
Output current IO 100 mA 3
Total power dissipation per transistor Ptot 200 mW Tamb ≤ 25 °C 3
Total power dissipation per device Ptot 300 mW Tamb ≤ 25 °C 3
Junction temperature Tj 150 °C 3
Ambient temperature Tamb -65 150 °C 3
Storage temperature Tstg -65 150 °C 3
Thermal resistance junction to ambient, per transistor Rth(j-a) 625 K/W in free air; device mounted on FR4 PCB, single-sided copper, tin-plated and standard footprint 3
Thermal resistance junction to ambient, per device Rth(j-a) 417 K/W in free air; device mounted on FR4 PCB, single-sided copper, tin-plated and standard footprint 3

CAD (KiCad official)

  • Symbol: PUMD16
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: pumd16-etched.step / pumd16-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pumd16.step / pumd16.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 70bccd71943482b2, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF