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PTH04T260WAD

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Texas Instruments DC-DC Power Modules, DIP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PTH04T260WAD

Texas Instruments · DC-DC Power Modules · DIP-10

PTH04T260WAD from Texas Instruments, in a DIP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SmartSync input Synchronizes the module switching frequency to an external clock with a SYNC high-level input of 2 V to 5.5 V; connect to GND (pin 3) if unused.
2 VI power_in Positive input voltage power node referenced to GND, operating over 2.2 V to 5.5 V.
3 GND power_in Common ground for the VI and VO power connections and the 0 Vdc reference for the control inputs.
4 VO power_out Regulated positive output, adjustable from 0.69 V to 3.6 V with respect to GND.
5 +Sense input Positive remote sense input that must be connected to VO close to the load for optimal voltage accuracy, and is also the reference terminal for the TurboTrans resistor.
6 -Sense input Negative remote sense input that must be connected to GND (pin 3) very close to the module (within 10 cm) for optimal voltage accuracy.
7 VO Adjust passive Output-voltage set pin where a 1%, 0.05 W, 100 ppm/°C (or better) resistor must be connected directly between this pin and -Sense (pin 6) to set the output above 0.69 V; if left open the output defaults to its lowest value.
8 TurboTrans input Transient-response adjust pin where a 1%, 0.05 W resistor connected to +Sense (pin 5) activates TurboTrans, and it must be left open-circuit if unused.
9 Track input Analog input that lets the output follow an external voltage volt-for-volt from 0 V up to the set-point voltage; connect to VI if unused.
10 Inhibit/UVLO input Negative-logic open-collector/drain inhibit where a low level referenced to GND disables the output, and a resistor to GND (pin 3) raises the UVLO ON threshold; leaving it open-circuit gives normal operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-10
Category Power Modules
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Track pin voltage VTrack -0.3 V Voltages with respect to GND; printed upper limit is VI + 0.3 V 3
Operating temperature range TA -40 85 °C Over VI range 3
Wave soldering temperature (5 s max), AD suffix Twave 260 °C AD suffix; surface temperature of module body or pins; 5 seconds maximum 3
Storage temperature Tstg -55 125 °C Storage temperature of module removed from shipping package 3
Mechanical shock, AD suffix 500 G AD suffix; Mil-STD-883D Method 2002.3, 1 msec, 1/2 sine, mounted 3
Mechanical vibration, AD suffix 20 G AD suffix; Mil-STD-883D Method 2007.2, 20-2000 Hz 3
Output current IO 0 3 A Over VO range; 25°C, natural convection 4
Input voltage range (VO 0.69 to 1.7 V) VI 2.2 5.5 V 0.69 ≤ VO ≤ 1.7; over IO range 4
Input voltage range (VO 1.7 to 3.6 V) VI 5.5 V 1.7 < VO ≤ 3.6; over IO range; minimum printed as VO+0.5 V (footnote 1) 4
Output adjust range 0.69 3.6 V Over IO range 4
Set-point voltage tolerance -1 1 %Vo Affected by RSET tolerance (2); unconditionally met with 1% RSET at 100 ppm/°C or better 4
Temperature variation -0.3 0.3 %Vo -40°C < TA < 85°C 4
Line regulation -2 2 mV Over VI range 4
Load regulation -2 2 mV Over IO range 4
Total output variation VO -1.5 1.5 %VO Includes set-point, line, load; -40°C ≤ TA ≤ 85°C (3) 4
Input low voltage, inhibit control (pin 10) VIL -0.2 0.6 V Inhibit control (pin 10) 4
Synchronization (SYNC) frequency fSYNC 240 400 kHz SYNC frequency 4
SYNC high-level input voltage VSYNCH 2 5.5 V SYNC high-level input 4
Capacitance × ESR product (CO × ESR) CO × ESR 1000 10000 µF×mΩ With TurboTrans 5
Equivalent series resistance (non-ceramic), minimum ESR 7 mΩ Without TurboTrans; minimum ESR limit of output capacitor bank (footnote 4) 5
External output capacitance, non-ceramic, minimum CO 150 µF Without TurboTrans; required for basic operation (footnote 8) 5
External output capacitance, ceramic, minimum CO 100 µF Without TurboTrans; required for basic operation (footnote 8) 5
External output capacitance, maximum without TurboTrans CO 5000 µF Without TurboTrans; calculated maximum (footnote 9) 5
External output capacitance, maximum with TurboTrans CO 5000 µF With TurboTrans; calculated maximum (footnote 11) 5
External input capacitance, minimum CI 330 µF Required for proper operation (footnote 7) 5

CAD (KiCad official)

  • Symbol: PTH04T260WAD
  • Footprint: Package_DIP:DIP-10_W7.62mm
  • 3D model: DIP-10 (KiCad packages3D, STEP)
  • 3D model files: pth04t260wad-etched.step / pth04t260wad-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pth04t260wad.step / pth04t260wad.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 67187f810cd8f75f, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF