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Ray Publish 0.1.0 fecae68 5d ago

PT7M7433TAEX

Diodes Incorporated · Monitors & Reset Circuits · SOT-23-5

PT7M7433TAEX from Diodes Incorporated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HTHIN input HTH threshold monitor input; a resistor-divider network sets the high threshold (615mV internal reference) associated with LBO/LBO.
2 GND power_in Ground reference pin for the device.
3 LTHIN input LTH threshold monitor input; a resistor-divider network sets the low threshold, and LBO is asserted when LTHIN falls below 615mV.
4 LBO output Low-battery output, asserted when LTHIN drops below VLTHIN and kept asserted for at least 90ms after HTHIN rises above VHTHIN; push-pull output for PT7M7433.
5 VCC power_in Supply voltage pin providing device power for the adjustable threshold versions, with an operating voltage range of 1.8V to 5.5V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23-5
Category Power Management ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range VCC 1.8 5.5 V TA= -40~85ºC 3
VCC Supply Current ICC 1.5 2.5 μA VCC = 3.7V, no load TA= -40~85ºC 3
Output Low Voltage VOL 0.3 V VCC ≥ 1.6V, Isink = 100μA 3
Output Low Voltage VOL 0.4 V VCC ≥ 4.5V, Isink = 3.2mA 3
Open-Drain Output Leakage Current ILKG 1 μA 3
Input Leakage Current ILKG 20 nA VHTHIN or VLTHIN > 400mV 3
HTHIN Threshold VHTHIN -1.5 1.5 % HTHIN rising, LBO is deasserted when HTHIN rises above 615mV; TA= 25ºC 3
HTHIN Threshold VHTHIN -2.5 -2.5 % HTHIN rising, LBO is deasserted when HTHIN rises above 615mV; TA= -30~70ºC 3
LTHIN Threshold VLTHIN -1.5 1.5 % LTHIN falling, LBO is asserted when LTHIN falls below 615mV; TA= 25ºC 3
LTHIN Threshold VLTHIN -2.5 -2.5 % LTHIN falling, LBO is asserted when LTHIN falls below 615mV; TA= -30~70ºC 3
Timeout period tLBOP 90 200 350 ms VCC =1.8V to 5.5V, TA= -40~85ºC 3
Delay tLBOD 70 s VCC =1.8V to 5.5V, TA= -40~85ºC 3
Supply Voltage to Ground Potential (Vcc to GND) VCC -0.3 7 V 2
Storage Temperature -65 150 oC 2
Ambient Temperature with Power Applied -40 85 oC 2
DC Output Current (All outputs) 20 mA 2
Power Dissipation 320 mW Depend on package 2

CAD (KiCad official)

  • Symbol: PT7M7433TAEX
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: pt7m7433taex-etched.step / pt7m7433taex-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pt7m7433taex.step / pt7m7433taex.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 f8b9e79ccfe2a8c1, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF