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PT5634A

PTC(Princeton Tech) · AC-DC Controllers And Regulators · SOP-8

PT5634A from PTC(Princeton Tech), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INV input Error amplifier inverting input that senses the PFC output voltage through a divider, with a 2.5V reference; pulling it below 0.2V latches the IC and turns off GD.
2 COMP output Error amplifier output that forms an integrator with INV; the output clamps the multiplier and latches GD above 27μA of COMP current in overvoltage protection.
3 MULT input Multiplier input that senses the rectified mains voltage through an external divider, with a specified input range of 0 to 2.5V (recommended 0 to 3.5V).
4 CS input Current sense input that resets GD when its voltage exceeds the multiplier output, with a per-cycle current limit threshold of 1.08V typical and 200ns typical leading-edge blanking.
5 ZCD input Zero-current detection input that sets GD when the inductor current falls to zero, with a falling threshold of 0.7V typical and an absolute maximum input voltage of 7.5V.
6 GND power_in System ground; all voltages in the datasheet are referenced to this pin.
7 GD output Gate driver output for the power MOSFET, with a clamp of 13.5V typical at VCC=20V and a maximum output current of 400mA.
8 VCC power_in IC supply that turns on at 12.5V and turns off at 10V under-voltage lockout, with an internal clamp of 25V typical and a recommended operating range of 14V to 22V.

Key specifications

Parameter Value
Manufacturer PTC(Princeton Tech)
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
IC supply voltage VCC 25 V 6
INV input voltage VINV -0.3 7 V 6
COMP input voltage VCOMP -0.3 7 V 6
MULT input voltage VMULT -0.3 7 V 6
CS input voltage VCS -0.3 7 V 6
ZCD input voltage VZCD -0.3 7.5 V 6
ZCD output current IZCD -3 3 mA 6
GD driver maximum output voltage VGD -0.3 V max printed as VCC+0.3 6
GD maximum output current IOMAX -400 400 mA 6
Operating temperature Topr -40 125 ℃ 6
Junction temperature Tj 125 ℃ 6
Storage temperature Tstg -40 150 ℃ 6
IC supply voltage VCC 14 22 V 6
MULT pin voltage VMULT 0 3.5 V 6
ZCD pin current IZCD -2 2 mA 6
VCC turn-on threshold (UVLO) VCCUV+ 11.5 12.5 13.5 V 7
VCC turn-off threshold (UVLO) VCCUV- 9 10 11 V 7
VCC start-up current IQCCUV 30 70 μA VCC=VCCUV+-0.2V 7
VCC quiescent current in OVP mode IQCCOVP 0.9 1.2 mA OVP 7
VCC quiescent current in enable-control (shutdown) mode IQCCSD 0.9 1.2 mA VZCD<0.2V 7
VCC operating current ICCHF 6 mA fPFC=50K; GD: 1nF+10R 7
VCC clamp voltage VCCCLAMP 22 25 28 V ICC=10mA 7
Error amplifier reference voltage VINV 2.475 2.5 2.525 V 7
COMP maximum voltage VCOMP_HIGH 5 5.5 6 V VINV=2.4V 7
COMP minimum voltage VCOMP_LOW 2.1 2.25 2.4 V VINV=2.6V 7
COMP maximum input (sink) current ICOMP_SINK 2 3.5 mA VINV=2.6V, VCOMP=4V 7
COMP maximum output (source) current ICOMP_SOURCE -2 -3 mA VINV=2.4V, VCOMP=4V 7
INV enable-control (disable) threshold voltage VINV_DIS 0.1 0.2 0.3 V 7
INV enable-control restart threshold voltage VINV_EN 0.3 0.45 0.55 V 7
MULT input voltage range VMULT 0 2.5 V 7
Multiplier gain coefficient K K 0.32 0.38 0.44 1/V VMULT=1V, VCOMP=4V 7
OVP COMP current threshold IOVP 23.5 27 30.5 μA 7
Static OVP COMP voltage threshold VS_OVP 2.1 2.25 2.4 V 7
ZCD high-side clamp voltage VZCD_HIGH 6.5 7 V IZCD=2.5mA 7
ZCD low-side clamp voltage VZCD_LOW -0.3 0 0.3 V IZCD=-0.5mA 7
ZCD input (sink) current IZCD_SINK 2.5 mA 7
ZCD output (source) current IZCD_SOURCE -1.5 mA 7
Maximum propagation delay from ZCD to GD TDEAD 100 400 ns 7
Restart time TRESTART 75 190 300 μs 7
Cycle-by-cycle current limit voltage threshold VCS_clamp 0.98 1.08 1.18 V 7
Current sense propagation delay TPKD 100 200 ns 7
Leading edge blanking time TLEB 200 400 ns 7
GD rise time tr 50 100 ns GD: 1nF+10R 7
GD fall time tf 30 70 ns GD: 1nF+10R 7
GD output clamp voltage Vgd_clamp 11 13.5 16 V VCC=20V 7
GD voltage in UVLO mode Vgd_s 1.1 V Igd=10mA 7
VCC voltage-regulator hysteresis (UVLO) VUVHYS 2.5 V 7
Multiplier gain GV 80 dB 7
Error amplifier bandwidth GB 1 MHz 7
OVP current threshold hysteresis IHYS 20 μA 7
ZCD rising-edge comparison threshold VZCD 1.4 V 7
ZCD comparator threshold hysteresis VZCD_HYS 0.7 V 7

CAD (KiCad official)

  • Symbol: PT5634A
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: pt5634a-etched.step / pt5634a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pt5634a.step / pt5634a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PTC(Princeton Tech) datasheet (10 pp, sha256 381f22ed300179e4, retrieved 2026-10-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF