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PT5139-HT-TP

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PTC Princeton Tech Stepper Motor Driver, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PT5139-HT-TP

PTC Princeton Tech · Stepper Motor Driver · HTSSOP-16-EP

PT5139-HT-TP from PTC Princeton Tech, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 nSLEEP input Sleep mode input: logic high enables the device, and logic low enters low-power sleep mode and resets all internal logic, with a 200K internal pull-down to GND.
2 AOUT1 output Connect to motor winding A; the AOUTx absolute maximum voltage is -0.3 to +VIN+1 V.
3 ASEN bidirectional Channel A current sense; connect to the current sensor resistor for Channel A, with sense voltage limited to -0.3 to +0.5 V absolute maximum.
4 AOUT2 output Connect to motor winding A; the AOUTx absolute maximum voltage is -0.3 to +VIN+1 V.
5 BOUT2 output Connect to motor winding B; the BOUTx absolute maximum voltage is -0.3 to +VIN+1 V.
6 BSEN bidirectional Channel B current sense; connect to the current sensor resistor for Channel B, with sense voltage limited to -0.3 to +0.5 V absolute maximum.
7 BOUT1 output Connect to motor winding B; the BOUTx absolute maximum voltage is -0.3 to +VIN+1 V.
8 FAULT output Open-drain fault output that is driven logic low when the device is in an over-temperature fault condition.
9 BIN1 input Bridge B input 1 controls BOUT1, with a 200K internal pull-down resistor to GND.
10 BIN2 input Bridge B input 2 controls BOUT2, with a 200K internal pull-down resistor to GND.
11 BST bidirectional Charge pump output; connect a 10nF to 100nF ceramic capacitor between BST and VIN (absolute maximum VIN+7 V).
12 VIN power_in Power device supply, ranging from 2.7V to 15V; a 10-µF ceramic bypass capacitor to GND is recommended.
13 GND power_in Device ground; both the GND pin and the device PowerPAD must be connected to ground.
14 VDD power_out Internal control and logic supply voltage for internal use only; connect a 2.2µF capacitor from VDD to GND and do not connect any external load to VDD.
15 AIN2 input Bridge A input 2 controls AOUT2, with a 200K internal pull-down resistor to GND.
16 AIN1 input Bridge A input 1 controls AOUT1, with a 200K internal pull-down resistor to GND.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer PTC Princeton Tech
Package HTSSOP-16-EP
Category Motor Driver ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Voltage VIN -0.3 18 V 11
AOUTx Voltage VAOUTx -0.3 V 11
BOUTx Voltage VBOUTx -0.3 V 11
BST Voltage VBST -0.3 V 11
Sense Voltage VSENx -0.3 0.5 V 11
All Other Pins -0.3 6.5 V 11
Junction Temperature TJ 150 ℃ 11
Lead Temperature TL 260 ℃ 11
Operating Temperature TOPR -40 85 ℃ 11
Storage Temperature TSTG -40 150 ℃ 11
Supply Voltage VIN 2.7 15 V 11
Operating Junction Temperature TJ -40 50 125 ℃ 11
Input Supply Voltage VIN 2.7 15 V 12
Quiescent Current IIN 1.1 mA nSLEEP=1, IOUT=0, Output disable 12
Sleep Current IIN_SLEEP 1 μA nSLEEP=0, VIN=5V 12
Body-Diode Forward Voltage VF 1 V IOUT=500mA 12
UVLO Threshold (Rising) VIN_RISE 2.7 V 12
Input Logic Low Threshold VIL 0.6 V 12
Input Logic High Threshold VIH 2 V 12
nSLEEP Logic, Low VSLEEP_L 0.4 V 12
nSLEEP Logic, High VSLEEP_H 2 V 12
Fault Output Logic, Low VFAULT_L 200 mV Flag triggered by OTP; 1mA Current 12
Fault Output Leakage Current ILEAK_FAULT 1 μA VFAULT=5V 12
Cross Over Delay TCROSS 200 300 650 ns HS off to LS on or LS off to HS on for one bridge arm 12
Sleep Mode Wakeup Time TWAKE 1 1.5 ms Sleep inactive high to full bridge turn on (VBST=100nF) 12
Blanking Time TBLANK 2.1 2.7 3.3 μs 13
Output Current IA/BOUT 700 mA 11
Thermal resistance, junction-to-ambient (TSSOP 16-EP 5.0x6.4mm) θJA 45 ℃/W Measured on JESD51-7, 4-layer PCB 11
Thermal resistance, junction-to-case (TSSOP 16-EP 5.0x6.4mm) θJC 10 ℃/W Measured on JESD51-7, 4-layer PCB 11

CAD (KiCad official)

  • Symbol: PT5139-HT-TP
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: pt5139-ht-tp-etched.step / pt5139-ht-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pt5139-ht-tp.step / pt5139-ht-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PTC Princeton Tech datasheet (18 pp, sha256 8fe7f12ced78437c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF