PT4308

{
  "slug": "pt4308",
  "version": "0.1.0",
  "type": "component",
  "description": "PTC Princeton Tech RF Transceiver ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "rf and wireless",
    "pt4308",
    "factory-2.0.0",
    "extractor-text"
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  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pt4308.kicad_sym",
    "pt4308.kicad_mod",
    "pt4308.glb",
    "pt4308.step",
    "pt4308.lbr",
    "docs/hero.png",
    "docs/pt4308-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pt4308-hero.glb",
    "pt4308-hero.overlay.json",
    "pt4308-etched.glb"
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  "component": {
    "mpn": "PT4308",
    "manufacturer": "PTC Princeton Tech",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "RF And Wireless",
    "subcategory": "RF Transceiver ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884852427276288",
    "parts": {
      "symbol": "pt4308.kicad_sym",
      "footprint": "pt4308.kicad_mod",
      "model_3d": "pt4308-hero.glb",
      "model_3d_plain": "pt4308-etched.glb",
      "model_3d_step": "pt4308-etched.step",
      "model_3d_step_plain": "pt4308.step",
      "lbr": "pt4308.lbr"
    },
    "distributor_links": {
      "lcsc": "C481966"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:16:20Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference for the device; the datasheet asks that the larger ground plane be placed as close as possible to all VSS pins."
      },
      {
        "number": "2",
        "name": "ANT",
        "type": "input",
        "description": "RF input connected to the antenna through an L-type matching network (L1/C1) to present 50 Ohm; ESD protection is rated at better than 4 kV HBM, 400 V MM and 1 kV CDM."
      },
      {
        "number": "3",
        "name": "VREG",
        "type": "power_out",
        "description": "Regulated core voltage output from the on-chip regulator, which requires a bypass capacitor C2 placed as close as possible to the pin."
      },
      {
        "number": "4",
        "name": "VDD5",
        "type": "power_in",
        "description": "5 V regulator input that accepts a supply range of 2.1 V to 5.5 V (5.0 V nominal) and should incorporate series-R, shunt-C filtering; absolute maximum is -0.3 V to 6 V."
      },
      {
        "number": "5",
        "name": "EN",
        "type": "input",
        "description": "Chip enable: tie HIGH for normal operation (VIH minimum 0.8 x VDD5) and LOW for standby (VIL maximum 0.2 x VDD5), where standby current is 1 µA maximum."
      },
      {
        "number": "6",
        "name": "DO",
        "type": "output",
        "description": "Data output with VOH minimum 0.9 x VDD5 at -1 µA and VOL maximum 0.1 x VDD5 at +1 µA, and a rise/fall time of about 2 µs at 15 pF load."
      },
      {
        "number": "7",
        "name": "CTH",
        "type": "bidirectional",
        "description": "Connection for the data slicing threshold capacitor CTH, which works with the on-chip 32.5 kΩ RTH to set the slicing level time constant; a squelch resistor may also be connected here."
      },
      {
        "number": "8",
        "name": "XIN",
        "type": "input",
        "description": "Reference oscillator input for the 13.598 MHz crystal (CLoad 220 pF in the reference design), requiring a minimum oscillation swing of 300 mVpP."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The PIN CONFIGURATION drawing on page 3 is garbled in the extracted text. The pinout was taken from ; The datasheet labels CTH as I/O, mapped here to bidirectional. XIN is labeled I in the datasheet and",
          "1/8 pins cited to the wrong page (name found elsewhere): ['8:XIN@p5']"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0596,
        "at": "2026-10-18T03:14:17"
      },
      "datasheet": {
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        "pages": 15,
        "sha256": "f3ac3a7eb2a87770",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
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      },
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        "checked": "2026-10-18",
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  }
}