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PT2513
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PTC(Princeton Tech) Motor Driver ICs, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PT2513
PTC(Princeton Tech) · Motor Driver ICs · HTSSOP-16-EP
PT2513 from PTC(Princeton Tech), in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | output | V-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 2 | UO | output | U-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 3 | RF | input | Current sense input: connect a resistor to ground for current limit or overcurrent detection, with PWM duty reduced when RF exceeds 0.3V (Vrf 0.25 to 0.35V, OCP reference 0.5V). |
| 4 | SEL | input | FG output select: FG output when open, at VREG or grounded, or 1/2FG output at 1/2 VREG; grounding also selects six-window ZC detection. |
| 5 | FWR | input | Forward/reverse direction setting (called FR in the function description); changing it during operation stops the motor and then reverses it. |
| 6 | FG | output | FG speed signal output, open-drain with pull-up up to VDD, low level 0.15V typ at 5mA. |
| 7 | MIN | input | Minimum duty cycle setting with operating range 0.5V to 3.0V; tied high (VREG) it is disabled. |
| 8 | MAX | input | Maximum duty cycle setting with operating range 0.5V to 3.0V; tied high (VREG) it is disabled. |
| 9 | GND | power_in | System ground. |
| 10 | VREG | power_out | Internal 5V regulator output (4.5 to 5.5V) requiring an external stabilizing capacitor (1uF in the application circuit). |
| 11 | COM | input | Motor virtual common (neutral) point used as back-EMF comparison reference; ZC filter capacitor between COM and FLT is 100pF to 10nF. |
| 12 | FLT | input | Back-EMF signal filter input; ZC filter capacitor between COM and FLT is 100pF to 10nF. |
| 13 | OSC | passive | Start-up step and acceleration adjustment capacitor pin, with capacitor about 100pF to 10nF (charge/discharge current 5.6uA). |
| 14 | VSP | input | Speed control command input accepting DC (0.3 to 3.0V) or PWM (1 to 25kHz); runs at maximum when left open. |
| 15 | VDD | power_in | Power supply input, operating range 6V to 16V (absolute maximum 20V). |
| 16 | WO | output | W-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 17 | Heatsink | passive | Back-side thermal pad (heatsink); datasheet lists it as a power pin without specifying the connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PTC(Princeton Tech) |
| Package | HTSSOP-16-EP |
| Category | Power Management ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | 6 | 16 | V | PT2513 | 7 | |
| Supply current | IDD | 5 | 7 | mA | PWM pin = VREG, no motor load | 7 | |
| VREG pin voltage | Vreg | 4.5 | 5 | 5.5 | V | no other external circuit | 7 |
| VSP DC control voltage | DCvsp | 0.3 | 3 | V | VSP input | 7 | |
| VSP PWM frequency | Fpwm | 1 | 25 | KHz | VSP input | 7 | |
| VSP PWM high-level input | Vpwmh | 3.3 | 5 | V | VSP input, PWM voltage rising | 7 | |
| VSP PWM low-level input | Vpwml | 0 | 0.3 | V | VSP input, PWM voltage falling | 7 | |
| FG output leakage current | Ifgl | 10 | A | VFG=20V | 7 | ||
| SEL voltage in FG output mode (high) | Vselh | 3.8 | V | SEL pin | 7 | ||
| SEL voltage in 1/2FG output mode | Vselm | 2 | 3 | V | SEL pin; typ printed as 1/2 VREG | 7 | |
| SEL voltage in FG output mode (low) | Vsell | 0 | 0.5 | V | SEL pin | 7 | |
| Current limit reference voltage | Vrf | 0.25 | 0.3 | 0.35 | V | RF pin | 7 |
| PMOS power transistor resistance | RPdson | 0.5 | Io = 500mA | 7 | |||
| NMOS power transistor resistance | RNdson | 0.5 | Io = 500mA | 7 | |||
| OSC pin charge current | Iosc | -5.6 | A | OSC pin | 7 | ||
| OSC pin discharge current | Iosc | 5.6 | A | OSC pin | 7 | ||
| FG output low level | Vfgl | 0.15 | V | IFG=5mA | 7 | ||
| Logic input pull-up current | Isource | 25 | A | FR, SEL pins | 7 | ||
| Overcurrent protection reference voltage | Vocp | 0.5 | V | RF pin | 7 | ||
| Lock protection release time | Tlock | 3 | S | OSC cap = 100pF | 7 | ||
| Thermal shutdown temperature | Tshdn | 150 | C | temperature rising, design target | 7 | ||
| Thermal shutdown release temperature | Trel | 120 | C | temperature falling, design target | 7 | ||
| VDD supply voltage (abs max) | VDDmax | 20 | V | PT2513 No break down | 6 | ||
| Output pin current | Iout,max | 1 | A | UO, VO, WO pins; 500ms test time, mounted on specified heatsink area | 6 | ||
| Input pin withstand voltage | Vin,max | 6 | V | PWM, OSC, FR, SEL | 6 | ||
| Power dissipation 1 | Pd,max1 | 0.3 | W | IC alone | 6 | ||
| Power dissipation 2 | Pd,max2 | 1.2 | W | IC mounted on test board with heatsink | 6 | ||
| Operating temperature | Topr | -40 | 85 | C | 6 | ||
| Storage temperature | Tstg | -40 | 150 | C | 6 |
CAD (KiCad official)
- Symbol:
PT2513 - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
pt2513-etched.step/pt2513-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pt2513.step/pt2513.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PTC(Princeton Tech) datasheet (9 pp, sha256
fafd1ce8c961a1a6, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PT2513
**PTC(Princeton Tech)** · Motor Driver ICs · HTSSOP-16-EP
PT2513 from PTC(Princeton Tech), in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | output | V-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 2 | UO | output | U-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 3 | RF | input | Current sense input: connect a resistor to ground for current limit or overcurrent detection, with PWM duty reduced when RF exceeds 0.3V (Vrf 0.25 to 0.35V, OCP reference 0.5V). |
| 4 | SEL | input | FG output select: FG output when open, at VREG or grounded, or 1/2FG output at 1/2 VREG; grounding also selects six-window ZC detection. |
| 5 | FWR | input | Forward/reverse direction setting (called FR in the function description); changing it during operation stops the motor and then reverses it. |
| 6 | FG | output | FG speed signal output, open-drain with pull-up up to VDD, low level 0.15V typ at 5mA. |
| 7 | MIN | input | Minimum duty cycle setting with operating range 0.5V to 3.0V; tied high (VREG) it is disabled. |
| 8 | MAX | input | Maximum duty cycle setting with operating range 0.5V to 3.0V; tied high (VREG) it is disabled. |
| 9 | GND | power_in | System ground. |
| 10 | VREG | power_out | Internal 5V regulator output (4.5 to 5.5V) requiring an external stabilizing capacitor (1uF in the application circuit). |
| 11 | COM | input | Motor virtual common (neutral) point used as back-EMF comparison reference; ZC filter capacitor between COM and FLT is 100pF to 10nF. |
| 12 | FLT | input | Back-EMF signal filter input; ZC filter capacitor between COM and FLT is 100pF to 10nF. |
| 13 | OSC | passive | Start-up step and acceleration adjustment capacitor pin, with capacitor about 100pF to 10nF (charge/discharge current 5.6uA). |
| 14 | VSP | input | Speed control command input accepting DC (0.3 to 3.0V) or PWM (1 to 25kHz); runs at maximum when left open. |
| 15 | VDD | power_in | Power supply input, operating range 6V to 16V (absolute maximum 20V). |
| 16 | WO | output | W-phase motor output; absolute maximum output pin current is 1.0 A (UO, VO, WO pins). |
| 17 | Heatsink | passive | Back-side thermal pad (heatsink); datasheet lists it as a power pin without specifying the connection. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PTC(Princeton Tech) |
| Package | HTSSOP-16-EP |
| Category | Power Management ICs |
| Pins | 17 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | 6 | | 16 | V | PT2513 | 7 |
| Supply current | IDD | | 5 | 7 | mA | PWM pin = VREG, no motor load | 7 |
| VREG pin voltage | Vreg | 4.5 | 5 | 5.5 | V | no other external circuit | 7 |
| VSP DC control voltage | DCvsp | 0.3 | | 3 | V | VSP input | 7 |
| VSP PWM frequency | Fpwm | 1 | | 25 | KHz | VSP input | 7 |
| VSP PWM high-level input | Vpwmh | 3.3 | | 5 | V | VSP input, PWM voltage rising | 7 |
| VSP PWM low-level input | Vpwml | 0 | | 0.3 | V | VSP input, PWM voltage falling | 7 |
| FG output leakage current | Ifgl | | | 10 | A | VFG=20V | 7 |
| SEL voltage in FG output mode (high) | Vselh | 3.8 | | | V | SEL pin | 7 |
| SEL voltage in 1/2FG output mode | Vselm | 2 | | 3 | V | SEL pin; typ printed as 1/2 VREG | 7 |
| SEL voltage in FG output mode (low) | Vsell | 0 | | 0.5 | V | SEL pin | 7 |
| Current limit reference voltage | Vrf | 0.25 | 0.3 | 0.35 | V | RF pin | 7 |
| PMOS power transistor resistance | RPdson | | 0.5 | | | Io = 500mA | 7 |
| NMOS power transistor resistance | RNdson | | 0.5 | | | Io = 500mA | 7 |
| OSC pin charge current | Iosc | | -5.6 | | A | OSC pin | 7 |
| OSC pin discharge current | Iosc | | 5.6 | | A | OSC pin | 7 |
| FG output low level | Vfgl | | 0.15 | | V | IFG=5mA | 7 |
| Logic input pull-up current | Isource | | 25 | | A | FR, SEL pins | 7 |
| Overcurrent protection reference voltage | Vocp | | 0.5 | | V | RF pin | 7 |
| Lock protection release time | Tlock | | 3 | | S | OSC cap = 100pF | 7 |
| Thermal shutdown temperature | Tshdn | | 150 | | C | temperature rising, design target | 7 |
| Thermal shutdown release temperature | Trel | | 120 | | C | temperature falling, design target | 7 |
| VDD supply voltage (abs max) | VDDmax | | | 20 | V | PT2513 No break down | 6 |
| Output pin current | Iout,max | | | 1 | A | UO, VO, WO pins; 500ms test time, mounted on specified heatsink area | 6 |
| Input pin withstand voltage | Vin,max | | | 6 | V | PWM, OSC, FR, SEL | 6 |
| Power dissipation 1 | Pd,max1 | | | 0.3 | W | IC alone | 6 |
| Power dissipation 2 | Pd,max2 | | | 1.2 | W | IC mounted on test board with heatsink | 6 |
| Operating temperature | Topr | -40 | | 85 | C | | 6 |
| Storage temperature | Tstg | -40 | | 150 | C | | 6 |
## CAD (KiCad official)
- Symbol: `PT2513`
- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files: `pt2513-etched.step` / `pt2513-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pt2513.step` / `pt2513.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PTC(Princeton Tech) datasheet](docs/pt2513-datasheet.pdf) (9 pp, sha256 `fafd1ce8c961a1a6`, retrieved 2026-10-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pt2513-datasheet.pdf)