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Contents

README

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PT2305

PUOLOP · MOSFETs · SOT-23

PT2305 from PUOLOP, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limit is ±12 V, with RDS(on) specified at VGS = -4.5 V and -2.5 V.
2 S passive Source of the P-channel MOSFET; maximum diode forward current is -1.6 A.
3 D passive Drain; drain-source voltage is -20 V, continuous drain current -4.1 A and pulsed drain current -15 A.

Key specifications

Parameter Value
Manufacturer PUOLOP
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -20 V 1
Gate-Source Voltage VGS -12 12 V 1
Continuous Drain Current ID -4.1 A 1
Pulsed Drain Current IDM -15 A Pulse width limited by maximum junction temperature (note 1) 1
Maximum Power Dissipation PD 1.25 W t <= 5 s, surface mounted on FR4 board (note 2) 1
Maximum Power Dissipation PD 0.8 W Surface mounted on FR4 board (note 3) 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Junction-to-Ambient Thermal Resistance (PCB mounted) RthJA 100 °C/W t <= 5 s, surface mounted on FR4 board (note 2) 1
Junction-to-Ambient Thermal Resistance (PCB mounted) RthJA 166 °C/W Surface mounted on FR4 board (note 3) 1
Drain-Source Breakdown Voltage BVDSS -20 V VGS = 0V, ID = -250uA 2
Drain-Source On-State Resistance RDS(on) 46 52 mΩ VGS = -4.5V, ID = -4.1A 2
Drain-Source On-State Resistance RDS(on) 60 75 mΩ VGS = -2.5V, ID = -3.0A 2
Gate Threshold Voltage VGS(th) 0.4 1 V VDS = VGS, ID = -250uA 2
Zero Gate Voltage Drain Current IDSS -1 uA VDS = -20V, VGS = 0V 2
Gate Body Leakage IGSS -100 100 nA VGS = ±12V, VDS = 0V 2
Forward Transconductance gfs 6.5 S VDS = -5V, ID = -3.5A 2
Total Gate Charge Qg 5.8 nC VDS = -6V, ID = -3.5A, VGS = -4.5V 2
Gate-Source Charge Qgs 0.85 nC VDS = -6V, ID = -3.5A, VGS = -4.5V 2
Gate-Drain Charge Qgd 1.7 nC VDS = -6V, ID = -3.5A, VGS = -4.5V 2
Turn-On Delay Time td(on) 13 ns VDD = -6V, RL = 6Ω, ID = -1A, VGEN = -4.5V, RG = 6Ω 2
Turn-On Rise Time tr 36 ns VDD = -6V, RL = 6Ω, ID = -1A, VGEN = -4.5V, RG = 6Ω 2
Turn-Off Delay Time td(off) 42 ns VDD = -6V, RL = 6Ω, ID = -1A, VGEN = -4.5V, RG = 6Ω 2
Turn-Off Fall Time tf 34 ns VDD = -6V, RL = 6Ω, ID = -1A, VGEN = -4.5V, RG = 6Ω 2
Input Capacitance Ciss 415 pF VDS = -6V, VGS = 0V, f = 1.0 MHz 2
Output Capacitance Coss 223 pF VDS = -6V, VGS = 0V, f = 1.0 MHz 2
Reverse Transfer Capacitance Crss 87 pF VDS = -6V, VGS = 0V, f = 1.0 MHz 2
Max. Diode Forward Current IS -1.6 A 2
Diode Forward Voltage VSD -1.2 V IS = -1.6A, VGS = 0V 2
Zero Gate Voltage Drain Current (TJ=55°C) IDSS -10 uA VDS = -20V, VGS = 0V, TJ = 55°C 2

CAD (KiCad official)

  • Symbol: PT2305
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pt2305-etched.step / pt2305-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pt2305.step / pt2305.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PUOLOP datasheet (5 pp, sha256 cce80f72a55a570d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF