PT2005A

{
  "schema_version": 1,
  "type": "component",
  "slug": "pt2005a",
  "title": "PT2005A",
  "brief": "PUOLOP Synchronous Rectifier Controllers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "pt2005a"
  ],
  "component": {
    "mpn": "PT2005A",
    "manufacturer": "PUOLOP",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Synchronous Rectifier Controllers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904526811815936",
    "parts": {
      "symbol": "pt2005a.kicad_sym",
      "footprint": "pt2005a.kicad_mod",
      "model_3d": "pt2005a-etched.glb",
      "model_3d_plain": "pt2005a.glb",
      "model_3d_step": "pt2005a-etched.step",
      "model_3d_step_plain": "pt2005a.step",
      "lbr": "pt2005a.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; connected to the source of the internal N-channel power MOSFET. Ties 1/2/3 are shorted internally to the MOSFET source and serve as the ground reference for all internal circuitry."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; connected to the source of the internal N-channel power MOSFET. Parallel with pins 1 and 3 for current handling and thermal dissipation."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; connected to the source of the internal N-channel power MOSFET. Parallel with pins 1 and 2."
      },
      {
        "number": "4",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply pin. VCC_ON start-up threshold ~3.9V, VCC_UVLO ~3.6V, VCC_OVP clamp 7.5-8.5V (typ 8.0V). Powered by internal self-supply circuit via SW/GND during flyback operation; typically decoupled with 0.1µF."
      },
      {
        "number": "5",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET (synchronous rectifier switch node). Absolute max SW voltage -0.7V to +40V; V(BR)DSS min 40V (typ 45V). Also used by the on-chip Vds sensing (VTHON/VTHOFF) and the internal self-supply charge path."
      },
      {
        "number": "6",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 7, 8 for current handling and thermal dissipation."
      },
      {
        "number": "7",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 8."
      },
      {
        "number": "8",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 7."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904526811815936",
        "pages": 5,
        "sha256": "77dce7917d967fff",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pt2005a.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pt2005a-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0151c294c476b450739d30b482dd4de670bd1e2794e01ea356eba8f591301905",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "PUOLOP",
      "Package": "SOIC-8",
      "Category": "Power Management (PMIC)",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "PT2005AA",
      "kind": "packaging"
    },
    {
      "mpn": "PT2005AB",
      "kind": "packaging"
    },
    {
      "mpn": "PT2005AC",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "pt2005a"
  ],
  "discovery_pitch": "PT2005A (PUOLOP) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pt2005a.kicad_sym",
    "pt2005a.kicad_mod",
    "pt2005a.glb",
    "pt2005a.step",
    "pt2005a.lbr",
    "docs/hero.png",
    "docs/pt2005a-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T04:33:08.288Z"
}