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Ray Publish 0.1.0 f236ce0 20d ago

PSR05-LF-T7

UMW · ESD And Surge Protection (TVS/ESD) · SOT-143

PSR05-LF-T7 from UMW, in a SOT-143. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the TVS diode array; the datasheet gives ESD protection of ±30 kV (IEC 61000-4-2) and clamping performance referenced to this pin.
2 I/O1 bidirectional Protected signal line 1 of the low-capacitance TVS array, with junction capacitance of 5 to 10 pF between I/O pins and ground at VR=0 V, 1 MHz.
3 I/O2 bidirectional Protected signal line 2 of the low-capacitance TVS array, with junction capacitance between I/O pins listed at 3 to 5 pF at VR=0 V, 1 MHz.
4 VDD power_in Supply-side pin of the TVS array, rated for a 5 V operating voltage per the datasheet features list.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-143
Category Circuit Protection
Pins 4

CAD (KiCad official)

  • Symbol: PSR05-LF-T7
  • Footprint: Package_TO_SOT_SMD:SOT-143
  • 3D model: SOT-143 (KiCad packages3D, STEP)
  • 3D model files: psr05-lf-t7-etched.step / psr05-lf-t7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); psr05-lf-t7.step / psr05-lf-t7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (6 pp, sha256 3c3932194998e01e, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF