component
PS05TCBUL2
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Leiditech ESD Protection Devices, DFN1006-2. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PS05TCBUL2
Leiditech · ESD Protection Devices · DFN1006-2
PS05TCBUL2 from Leiditech, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bi-directional TVS terminal (1-line, 5V working voltage, ±20kV contact ESD per IEC 61000-4-2); interchangeable with pin 2. |
| 2 | 2 | passive | Bi-directional TVS terminal (1-line, 5V working voltage, ±20kV contact ESD per IEC 61000-4-2); interchangeable with pin 1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | DFN1006-2 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | 5 | V | 2 | |||
| Breakdown Voltage | VBR | 8 | 12 | 14 | V | IT = 1mA | 2 |
| Holding Voltage | Vh | 2.6 | 4 | V | IT = 100mA | 2 | |
| Reverse Leakage Current | IR | 0.2 | µA | VRWM = 5.0V | 2 | ||
| Clamping Voltage | VC | 5 | V | IPP = 1A (8 x 20µs pulse) | 2 | ||
| Clamping Voltage | VC | 6 | 8 | V | IPP = 5A (8 x 20µs pulse) | 2 | |
| Junction Capacitance | CJ | 0.5 | 1 | pF | VR = 0V, f = 1MHz | 2 | |
| Clamping Voltage (TLP) | VC | 4.82 | V | IPP = 12A (TLP) | 2 | ||
| Clamping Voltage (TLP) | VC | 7.86 | V | IPP = 16A (TLP) | 2 | ||
| Peak Pulse Power | Ppp | 35 | W | 8/20µs, Tamb=25°C | 1 | ||
| ESD per IEC 61000-4-2 (Air) | VESD | -25 | 25 | kV | Tamb=25°C | 1 | |
| ESD per IEC 61000-4-2 (Contact) | VESD | -20 | 20 | kV | Tamb=25°C | 1 | |
| Operating Temperature Range | TJ | -40 | 125 | °C | 1 | ||
| Storage Temperature Range | TSTJ | -55 | 150 | °C | 1 |
CAD (KiCad official)
- Symbol:
PS05TCBUL2 - Footprint:
Diode_SMD:D_SOD-882 - 3D model: DFN1006-2 (KiCad packages3D, STEP)
- 3D model files:
ps05tcbul2-etched.step/ps05tcbul2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ps05tcbul2.step/ps05tcbul2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (4 pp, sha256
6d6b9a5b80af998c, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PS05TCBUL2
**Leiditech** · ESD Protection Devices · DFN1006-2
PS05TCBUL2 from Leiditech, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bi-directional TVS terminal (1-line, 5V working voltage, ±20kV contact ESD per IEC 61000-4-2); interchangeable with pin 2. |
| 2 | 2 | passive | Bi-directional TVS terminal (1-line, 5V working voltage, ±20kV contact ESD per IEC 61000-4-2); interchangeable with pin 1. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | DFN1006-2 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | | | 5 | V | | 2 |
| Breakdown Voltage | VBR | 8 | 12 | 14 | V | IT = 1mA | 2 |
| Holding Voltage | Vh | 2.6 | | 4 | V | IT = 100mA | 2 |
| Reverse Leakage Current | IR | | | 0.2 | µA | VRWM = 5.0V | 2 |
| Clamping Voltage | VC | | | 5 | V | IPP = 1A (8 x 20µs pulse) | 2 |
| Clamping Voltage | VC | 6 | | 8 | V | IPP = 5A (8 x 20µs pulse) | 2 |
| Junction Capacitance | CJ | | 0.5 | 1 | pF | VR = 0V, f = 1MHz | 2 |
| Clamping Voltage (TLP) | VC | | 4.82 | | V | IPP = 12A (TLP) | 2 |
| Clamping Voltage (TLP) | VC | | 7.86 | | V | IPP = 16A (TLP) | 2 |
| Peak Pulse Power | Ppp | | | 35 | W | 8/20µs, Tamb=25°C | 1 |
| ESD per IEC 61000-4-2 (Air) | VESD | -25 | | 25 | kV | Tamb=25°C | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -20 | | 20 | kV | Tamb=25°C | 1 |
| Operating Temperature Range | TJ | -40 | | 125 | °C | | 1 |
| Storage Temperature Range | TSTJ | -55 | | 150 | °C | | 1 |
## CAD (KiCad official)
- Symbol: `PS05TCBUL2`
- Footprint: `Diode_SMD:D_SOD-882`
- 3D model: DFN1006-2 (KiCad packages3D, STEP)
- 3D model files: `ps05tcbul2-etched.step` / `ps05tcbul2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ps05tcbul2.step` / `ps05tcbul2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Leiditech datasheet](docs/ps05tcbul2-datasheet.pdf) (4 pp, sha256 `6d6b9a5b80af998c`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ps05tcbul2-datasheet.pdf)