component
PN8680PSEC-R1
Public Made by Adomby adom
Wuxi Chipown Micro electronics AC-DC Controllers and Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPN8680PSEC-R1
Wuxi Chipown Micro electronics · AC-DC Controllers and Regulators · SOP-8
PN8680PSEC-R1 from Wuxi Chipown Micro electronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Chip supply input pin. Operating range 10-30 V; VDDon typ 16.5 V (14.5-18.5 V), VDDoff typ 8.5 V (7.5-9.5 V), OVP threshold typ 34 V. Provide bulk decoupling from auxiliary winding rectification. |
| 2 | GND | power_in | Device ground reference for all internal analog and digital circuitry as well as the source of the integrated power MOSFET return path. |
| 3 | FB | input | Primary-side feedback input. Senses reflected output voltage from the auxiliary winding via a resistor divider for regulation. VREF_CV typ 2.5 V; FBOVP typ 3.0 V; UVP typ 1.55 V; max cable-compensation current Icable typ 36 uA. |
| 4 | CS | input | Current-sense input for cycle-by-cycle peak-current control and OCP. Connect to a sense resistor from the internal MOSFET source path. VTH_OC typ 500 mV (485-515 mV), VTH_OC_MAX typ 560 mV; also used for CS open/short protection. External resistor on CS sets constant-current point. |
| 5 | SW | power_out | Drain pin of the integrated 650 V smart power MOSFET, connected to the transformer primary winding. Pins 5, 6, 7, 8 are tied together internally for current-handling and heat-sinking. RDS(on) typ 2.5 Ω at ISW=1 A; avalanche pulse current 3 A (Tpulse=100 us). |
| 6 | SW | power_out | Drain of the integrated 650 V power MOSFET, paralleled with pins 5, 7, 8 to form the SW node connecting to the transformer primary. |
| 7 | SW | power_out | Drain of the integrated 650 V power MOSFET, paralleled with pins 5, 6, 8 to form the SW node connecting to the transformer primary. |
| 8 | SW | power_out | Drain of the integrated 650 V power MOSFET, paralleled with pins 5, 6, 7 to form the SW node connecting to the transformer primary. Recommended copper area >20 mm^2 for thermal dissipation (RθJC ~80 °C/W package, ~40 °C/W actual with good copper). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Chipown Micro electronics |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
PN8680PSEC-R1
CAD (KiCad official)
- Symbol:
PN8680PSEC-R1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
pn8680psec-r1-etched.step/pn8680psec-r1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pn8680psec-r1.step/pn8680psec-r1.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
pn8680psec-r1.step |
122 KB | You want the bare part, or you mark your own boards. |
pn8680psec-r1-etched.step |
2.9 MB | You want the part with PN8680PSEC-R1 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 684 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi Chipown Micro electronics datasheet (11 pp, sha256
e49a8f29de1494da, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).