component
PN8386SEC-R1
Public Made by Adomby adom
Wuxi Chipown Micro-electronics AC-DC Controllers & Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PN8386SEC-R1
Wuxi Chipown Micro-electronics · AC-DC Controllers & Regulators · SOP-8
PN8386SEC-R1 from Wuxi Chipown Micro-electronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin of the chip. |
| 2 | VDD | power_in | Supply voltage input pin with operating range 10 to 30V (absolute max -0.3 to 40V), UVLO off at 8.5V typ, on at 16.5V typ. |
| 3 | FB | input | Feedback pin where the auxiliary winding voltage is fed back through a resistor divider to regulate the output (-0.3 to 5.5V, 2.5V reference); also sources cable compensation current. |
| 4 | CS | input | Current sense pin; the resistor sets the CC mode point and max output power, with 500mV typical overcurrent threshold (-0.3 to 5.5V). |
| 5 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 6 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 7 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 8 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Chipown Micro-electronics |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD pin voltage | VDD | -0.3 | 40 | V | 3 | ||
| FB, CS pin voltage | -0.3 | 5.5 | V | 3 | |||
| SW pin voltage | -0.3 | 650 | V | 3 | |||
| Junction operating temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature | TSTG | -55 | 150 | °C | 3 | ||
| HBM ESD | -4 | 4 | kV | HBM | 3 | ||
| Drain pulse current | 5 | A | Tpulse=100us | 3 | |||
| Power MOSFET breakdown voltage | BVDSS | 650 | 700 | V | ISW =250uA | 3 | |
| Off-state leakage current | IOFF | 100 | μA | Vsw =500V | 3 | ||
| On-resistance | RDS(on) | 1.6 | Ω | ISW = 1A, TJ = 25℃ | 3 | ||
| Startup voltage | VSW_START | 30 | V | VDD=VDDon - 1V | 3 | ||
| VDD operating voltage range | VDD | 10 | 30 | V | 3 | ||
| VDD startup threshold | VDDon | 14.5 | 16.5 | 18.5 | V | 3 | |
| VDD undervoltage threshold | VDDoff | 7.5 | 8.5 | 9.5 | V | 3 | |
| VDD overvoltage protection | VDDovp | 30 | 34 | 38 | V | 3 | |
| Startup charging current to VDD | IDD_CH | 0.85 | mA | VDD=VDDon - 1V, Vsw=100V | 3 | ||
| Operating supply current | IDD | 0.3 | 0.5 | 0.7 | mA | VDD = 19.5V | 3 |
| Fault state supply current | IDD_FAULT | 0.5 | mA | VDD＝15V after fault | 3 | ||
| Overcurrent threshold voltage | VTH_OC | 485 | 500 | 515 | mV | 3 | |
| Maximum overcurrent threshold voltage | VTH_OC_MAX | 560 | mV | 3 | |||
| Minimum CS threshold voltage | Vcs_min | 170 | mV | 3 | |||
| Leading edge blanking time | TLEB | 300 | ns | 3 | |||
| Maximum on time | Tonmax | 50 | us | 3 | |||
| Overcurrent delay time | TD_OC | 100 | ns | 3 | |||
| No-load feedback reference voltage | VREF_CV | 2.475 | 2.5 | 2.525 | V | 3 | |
| Output OVP threshold voltage | VFBOVP | 2.85 | 3 | 3.15 | V | 3 | |
| Output UVP threshold voltage | VUVP | 1.55 | V | 3 | |||
| Maximum cable compensation current | Icable | 44 | 48 | 52 | uA | VFB=0V | 3 |
| Minimum off time | Toffmin | 5 | us | 3 | |||
| Maximum off time | Toffmax | 2.2 | ms | 3 | |||
| Output UVP blanking time | TUVP | 20 | 32 | ms | 开关频率50kHz | 4 | |
| Thermal shutdown temperature | TSD | 135 | 150 | °C | 4 | ||
| Thermal shutdown hysteresis | THYST | 30 | °C | 4 |
CAD (KiCad official)
- Symbol:
PN8386SEC-R1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
pn8386sec-r1-etched.step/pn8386sec-r1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pn8386sec-r1.step/pn8386sec-r1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi Chipown Micro-electronics datasheet (12 pp, sha256
1f26fe7cebd4539c, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PN8386SEC-R1
**Wuxi Chipown Micro-electronics** · AC-DC Controllers & Regulators · SOP-8
PN8386SEC-R1 from Wuxi Chipown Micro-electronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin of the chip. |
| 2 | VDD | power_in | Supply voltage input pin with operating range 10 to 30V (absolute max -0.3 to 40V), UVLO off at 8.5V typ, on at 16.5V typ. |
| 3 | FB | input | Feedback pin where the auxiliary winding voltage is fed back through a resistor divider to regulate the output (-0.3 to 5.5V, 2.5V reference); also sources cable compensation current. |
| 4 | CS | input | Current sense pin; the resistor sets the CC mode point and max output power, with 500mV typical overcurrent threshold (-0.3 to 5.5V). |
| 5 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 6 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 7 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
| 8 | SW | passive | Drain of the internal smart power MOSFET connected to the transformer primary, rated -0.3 to 650V; pins 5, 6, 7 and 8 are tied together. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Chipown Micro-electronics |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD pin voltage | VDD | -0.3 | | 40 | V | | 3 |
| FB, CS pin voltage | | -0.3 | | 5.5 | V | | 3 |
| SW pin voltage | | -0.3 | | 650 | V | | 3 |
| Junction operating temperature | TJ | -40 | | 150 | °C | | 3 |
| Storage temperature | TSTG | -55 | | 150 | °C | | 3 |
| HBM ESD | | -4 | | 4 | kV | HBM | 3 |
| Drain pulse current | | | | 5 | A | Tpulse=100us | 3 |
| Power MOSFET breakdown voltage | BVDSS | 650 | 700 | | V | ISW =250uA | 3 |
| Off-state leakage current | IOFF | | | 100 | μA | Vsw =500V | 3 |
| On-resistance | RDS(on) | | | 1.6 | Ω | ISW = 1A, TJ = 25℃ | 3 |
| Startup voltage | VSW_START | | | 30 | V | VDD=VDDon - 1V | 3 |
| VDD operating voltage range | VDD | 10 | | 30 | V | | 3 |
| VDD startup threshold | VDDon | 14.5 | 16.5 | 18.5 | V | | 3 |
| VDD undervoltage threshold | VDDoff | 7.5 | 8.5 | 9.5 | V | | 3 |
| VDD overvoltage protection | VDDovp | 30 | 34 | 38 | V | | 3 |
| Startup charging current to VDD | IDD_CH | | 0.85 | | mA | VDD=VDDon - 1V, Vsw=100V | 3 |
| Operating supply current | IDD | 0.3 | 0.5 | 0.7 | mA | VDD = 19.5V | 3 |
| Fault state supply current | IDD_FAULT | | 0.5 | | mA | VDD＝15V after fault | 3 |
| Overcurrent threshold voltage | VTH_OC | 485 | 500 | 515 | mV | | 3 |
| Maximum overcurrent threshold voltage | VTH_OC_MAX | | 560 | | mV | | 3 |
| Minimum CS threshold voltage | Vcs_min | | 170 | | mV | | 3 |
| Leading edge blanking time | TLEB | | 300 | | ns | | 3 |
| Maximum on time | Tonmax | | 50 | | us | | 3 |
| Overcurrent delay time | TD_OC | | 100 | | ns | | 3 |
| No-load feedback reference voltage | VREF_CV | 2.475 | 2.5 | 2.525 | V | | 3 |
| Output OVP threshold voltage | VFBOVP | 2.85 | 3 | 3.15 | V | | 3 |
| Output UVP threshold voltage | VUVP | | 1.55 | | V | | 3 |
| Maximum cable compensation current | Icable | 44 | 48 | 52 | uA | VFB=0V | 3 |
| Minimum off time | Toffmin | | 5 | | us | | 3 |
| Maximum off time | Toffmax | | 2.2 | | ms | | 3 |
| Output UVP blanking time | TUVP | 20 | | 32 | ms | 开关频率50kHz | 4 |
| Thermal shutdown temperature | TSD | 135 | 150 | | °C | | 4 |
| Thermal shutdown hysteresis | THYST | | 30 | | °C | | 4 |
## CAD (KiCad official)
- Symbol: `PN8386SEC-R1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `pn8386sec-r1-etched.step` / `pn8386sec-r1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pn8386sec-r1.step` / `pn8386sec-r1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi Chipown Micro-electronics datasheet](docs/pn8386sec-r1-datasheet.pdf) (12 pp, sha256 `1f26fe7cebd4539c`, retrieved 2026-10-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pn8386sec-r1-datasheet.pdf)