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PN8160NEC-T1H

Wuxi Chipown Micro electronics · AC-DC Controllers And Regulators · DIP-8

PN8160NEC-T1H from Wuxi Chipown Micro electronics, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin of the controller; the datasheet recommends routing the GND pin to the input electrolytic capacitor ground as short and thick as possible.
2 VDD power_in Operating supply voltage input; the datasheet gives a VDD absolute maximum of -0.3 to 45 V, with UVLO off at 16.5 V typ, UVLO on at 8 V typ, and OVP at 40 V typ.
3 FB input Feedback input; the datasheet rates the FB pin at -0.3 to 5 V and gives an FB open-circuit voltage of 5.1 V typ and a load-protection threshold (Vth_OLP) of 4.4 V typ.
4 DMG input Demagnetization sense pin that samples the output voltage and input voltage through a resistor divider; the datasheet rates DMG at -0.3 to 5 V and gives a DMG overvoltage threshold of 3 V typ.
5 SW passive High-voltage MOSFET drain pin; the datasheet rates SW at -0.3 to 650 V and gives a BVDSS of 650 V min.
6 SW passive High-voltage MOSFET drain pin; the datasheet rates SW at -0.3 to 650 V and gives a BVDSS of 650 V min.
7 SW passive High-voltage MOSFET drain pin; the datasheet rates SW at -0.3 to 650 V and gives a BVDSS of 650 V min.
8 SW passive High-voltage MOSFET drain pin; the datasheet rates SW at -0.3 to 650 V and gives a BVDSS of 650 V min.

Key specifications

Parameter Value
Manufacturer Wuxi Chipown Micro electronics
Package DIP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD pin withstand voltage -0.3 45 V 3
FB, CS, DMG pin withstand voltage -0.3 5 V 3
SW pin withstand voltage -0.3 650 V 3
Junction operating temperature range -40 150 ℃ 3
Storage temperature range -55 150 ℃ 3
ESD capability, human body model (HBM) -4 4 kV HBM, per ESDA/JEDEC JDS-001-2014 3
Drain pulse current 5 A Tpulse=100us 3
Power MOSFET breakdown voltage BVDSS 650 690 V ISW =250uA 3
VDD start threshold voltage UVLOoff 15.5 16.5 17.5 V 3
VDD undervoltage protection threshold voltage UVLOon 7 8 9 V 3
VDD overvoltage protection voltage OVP 38 40 43 V 3
Switching operating current IVDD0 1 2.5 3.5 mA VFB=3.5V 3
Intermittent (burst) operating current IVDD1 0.4 0.8 1.5 mA VFB=0.5V 3
Protection-state operating current IVDD_Fault 0.3 0.5 1 mA 3
Switching frequency (high input voltage segment) Fosc 60 65 70 KHz IDMG>330uA 3
Switching frequency (low input voltage segment) Fosc 77 85 92 KHz IDMG<330uA 3
Intermittent-mode operating frequency Fosc_BM 22 25 28 KHz 3
FB open-circuit voltage VFB 4.8 5.1 5.4 V ISW =250uA 3
Maximum duty cycle Dmax 70 90 % 3
Overload protection threshold voltage Vth_OLP 4.1 4.4 4.7 V 4
Overtemperature protection temperature TSD 130 145 °C 4
DMG overvoltage protection threshold voltage VDMG_OVP 2.7 3 3.3 V 4
Maximum peak current (PN8160H/M) IDlim 0.75 0.8 0.85 A 4
Package thermal resistance RθJC (DIP-8) RθJC 40 ℃/W DIP-8 package 3
Turn-off/blanking: FB input open-circuit undervoltage start (FB entering PFM threshold, low) VFB_PFM_L 1.9 V 3
FB threshold exiting PFM (high) VFB_PFM_H 2.1 V 3
FB threshold entering intermittent mode (low) VFB_BM_L 1.15 V 3
FB threshold exiting intermittent mode (high) VFB_BM_H 1.25 V 3
VDD overvoltage protection delay time Td_OVP 80 us 3
VDD restart threshold voltage VRestart 4 V 3
Start-up transistor charging current IVDD_CH -1 mA 3
FB short-circuit current IFB_SHORT 0.2 mA 3
Power MOSFET off-state leakage current IOFF 100 μA Vsw =650V 3
On-resistance (PN8160T/R/H) RDS(on) 1.6 Ω ISW = 0.8A, TJ = 25℃ 3
Soft-start time Tss 3.2 ms 4
Leading-edge blanking time TLEB 400 ns 4
Burst-mode peak current IDbm 0.2 A 4
Secondary rectifier short-circuit protection threshold voltage VDSP 1.1 V 4
Secondary rectifier short-circuit protection delay Td_DSP 7 Cycles 4
DMG overvoltage protection delay time Td_DOVP 7 Cycles 4
Maximum clock start-up waiting time Thold 5 us 4
Minimum duty cycle for slope compensation Duty_Slope 35 % Fosc=65kHZ 4
Maximum on-time Ton_max 12 us 4
Overtemperature protection hysteresis THYST 30 °C 4

CAD (KiCad official)

  • Symbol: PN8160NEC-T1H
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: pn8160nec-t1h-etched.step / pn8160nec-t1h-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pn8160nec-t1h.step / pn8160nec-t1h.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi Chipown Micro electronics datasheet (11 pp, sha256 3a7997a0d1f57fb3, retrieved 2026-10-16, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF