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Contents

README

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PMV48XPAR

Nexperia · MOSFETs · SOT-23

PMV48XPAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the P-channel trench MOSFET; the gate-source voltage is limited to -12 V to 12 V (Tamb = 25 °C).
2 S passive Source of the MOSFET; the source current IS is limited to -1 A (Tamb = 25 °C, Table 5).
3 D passive Drain of the MOSFET; drain-source voltage is limited to -20 V and the drain current to -3.5 A at VGS = -4.5 V, Tamb = 25 °C.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: PMV48XPAR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pmv48xpar-etched.step / pmv48xpar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pmv48xpar.step / pmv48xpar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 d94f65730f027fbf, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF