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Contents

README

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PMV250EPEAR

Nexperia · MOSFETs · SOT-23

PMV250EPEAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input with operating voltage range VGS -20 to 20 V (Tj = 25 °C) and gate-source threshold voltage -1.7 V typical.
2 S passive Source terminal with parasitic source-drain diode forward voltage -0.8 to -1.2 V at 0.86 A (VGS = 0 V, Tj = 25 °C).
3 D passive Drain terminal rated for maximum drain-source voltage -40 V, drain current -1.5 A (VGS = -10 V, Tamb = 25 °C), and on-state resistance 180-240 mΩ.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: PMV250EPEAR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pmv250epear-etched.step / pmv250epear-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pmv250epear.step / pmv250epear.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 abcc7644601ce902, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF