component
PMV120ENEAR
Public Made by Adomby adom
Nexperia MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PMV120ENEAR
Nexperia · MOSFETs · SOT-23
PMV120ENEAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the datasheet limits VGS to -20 V to 20 V at Tj = 25 °C. |
| 2 | S | passive | Source terminal; the datasheet limits the source current IS to 0.8 A at Tamb = 25 °C. |
| 3 | D | passive | Drain terminal; the datasheet limits VDS to 60 V and the continuous drain current ID to 2.1 A at Tamb = 25 °C with VGS = 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| drain-source voltage | VDS | 60 | V | 2 | |||
| gate-source voltage | VGS | -20 | 20 | V | Tj = 25 °C | 2 | |
| drain current | ID | 2.1 | A | VGS = 10 V; Tamb = 25 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 2 | ||
| drain current | ID | 1.3 | A | VGS = 10 V; Tamb = 100 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 2 | ||
| peak drain current | IDM | 8.3 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 2 | ||
| non-repetitive drain-source avalanche energy | EDS(AL)S | 9 | mJ | Tj(init) = 25 °C; ID = 0.3 A; DUT in avalanche (unclamped) | 2 | ||
| total power dissipation | Ptot | 513 | mW | Tamb = 25 °C; [2] FR4 PCB, standard footprint | 2 | ||
| total power dissipation | Ptot | 1.05 | W | [1] FR4 PCB, mounting pad for drain 6 cm2 | 3 | ||
| total power dissipation | Ptot | 6.4 | W | Tsp = 25 °C | 3 | ||
| junction temperature | Tj | -55 | 150 | °C | 3 | ||
| ambient temperature | Tamb | -55 | 150 | °C | 3 | ||
| storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| source current | IS | 0.8 | A | Tamb = 25 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 3 | ||
| electrostatic discharge voltage | VESD | 2000 | V | HBM; measured between all pins | 3 | ||
| thermal resistance from junction to ambient | Rth(j-a) | 212 | 244 | K/W | in free air; [1] FR4 PCB, standard footprint | 5 | |
| thermal resistance from junction to ambient | Rth(j-a) | 104 | 119 | K/W | [2] FR4 PCB, mounting pad for drain 6 cm2 | 5 | |
| thermal resistance from junction to solder point | Rth(j-sp) | 17 | 20 | K/W | 5 | ||
| drain-source breakdown voltage | V(BR)DSS | 60 | V | ID = 250 µA; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate-source threshold voltage | VGSth | 1.3 | 1.7 | 2.7 | V | ID = 250 µA; VDS=VGS; Tj = 25 °C | 6 |
| drain leakage current | IDSS | 1 | µA | VDS = 60 V; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | 10 | µA | VGS = 20 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | -10 | µA | VGS = -20 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | 1 | µA | VGS = 10 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | -1 | µA | VGS = -10 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| drain-source on-state resistance | RDSon | 96 | 123 | mΩ | VGS = 10 V; ID = 2.1 A; Tj = 25 °C | 6 | |
| drain-source on-state resistance | RDSon | 192 | 246 | mΩ | VGS = 10 V; ID = 2.1 A; Tj = 150 °C | 6 | |
| drain-source on-state resistance | RDSon | 108 | 146 | mΩ | VGS = 4.5 V; ID = 1.9 A; Tj = 25 °C | 6 | |
| source-drain voltage | VSD | 0.8 | 1.2 | V | IS = 0.8 A; VGS = 0 V; Tj = 25 °C | 6 | |
| total gate charge | QG(tot) | 5.9 | 7.4 | nC | VDS = 30 V; ID = 2.1 A; VGS = 10 V; Tj = 25 °C | 6 |
CAD (KiCad official)
- Symbol:
PMV120ENEAR - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pmv120enear-etched.step/pmv120enear-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pmv120enear.step/pmv120enear.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
8c5f7e8d6cf0f9f0, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PMV120ENEAR
**Nexperia** · MOSFETs · SOT-23
PMV120ENEAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the datasheet limits VGS to -20 V to 20 V at Tj = 25 °C. |
| 2 | S | passive | Source terminal; the datasheet limits the source current IS to 0.8 A at Tamb = 25 °C. |
| 3 | D | passive | Drain terminal; the datasheet limits VDS to 60 V and the continuous drain current ID to 2.1 A at Tamb = 25 °C with VGS = 10 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| drain-source voltage | VDS | | | 60 | V | | 2 |
| gate-source voltage | VGS | -20 | | 20 | V | Tj = 25 °C | 2 |
| drain current | ID | | | 2.1 | A | VGS = 10 V; Tamb = 25 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 2 |
| drain current | ID | | | 1.3 | A | VGS = 10 V; Tamb = 100 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 2 |
| peak drain current | IDM | | | 8.3 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 2 |
| non-repetitive drain-source avalanche energy | EDS(AL)S | | | 9 | mJ | Tj(init) = 25 °C; ID = 0.3 A; DUT in avalanche (unclamped) | 2 |
| total power dissipation | Ptot | | | 513 | mW | Tamb = 25 °C; [2] FR4 PCB, standard footprint | 2 |
| total power dissipation | Ptot | | | 1.05 | W | [1] FR4 PCB, mounting pad for drain 6 cm2 | 3 |
| total power dissipation | Ptot | | | 6.4 | W | Tsp = 25 °C | 3 |
| junction temperature | Tj | -55 | | 150 | °C | | 3 |
| ambient temperature | Tamb | -55 | | 150 | °C | | 3 |
| storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| source current | IS | | | 0.8 | A | Tamb = 25 °C; [1] FR4 PCB, mounting pad for drain 6 cm2 | 3 |
| electrostatic discharge voltage | VESD | | | 2000 | V | HBM; measured between all pins | 3 |
| thermal resistance from junction to ambient | Rth(j-a) | | 212 | 244 | K/W | in free air; [1] FR4 PCB, standard footprint | 5 |
| thermal resistance from junction to ambient | Rth(j-a) | | 104 | 119 | K/W | [2] FR4 PCB, mounting pad for drain 6 cm2 | 5 |
| thermal resistance from junction to solder point | Rth(j-sp) | | 17 | 20 | K/W | | 5 |
| drain-source breakdown voltage | V(BR)DSS | 60 | | | V | ID = 250 µA; VGS = 0 V; Tj = 25 °C | 6 |
| gate-source threshold voltage | VGSth | 1.3 | 1.7 | 2.7 | V | ID = 250 µA; VDS=VGS; Tj = 25 °C | 6 |
| drain leakage current | IDSS | | | 1 | µA | VDS = 60 V; VGS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | 10 | µA | VGS = 20 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | -10 | µA | VGS = -20 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | 1 | µA | VGS = 10 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | -1 | µA | VGS = -10 V; VDS = 0 V; Tj = 25 °C | 6 |
| drain-source on-state resistance | RDSon | | 96 | 123 | mΩ | VGS = 10 V; ID = 2.1 A; Tj = 25 °C | 6 |
| drain-source on-state resistance | RDSon | | 192 | 246 | mΩ | VGS = 10 V; ID = 2.1 A; Tj = 150 °C | 6 |
| drain-source on-state resistance | RDSon | | 108 | 146 | mΩ | VGS = 4.5 V; ID = 1.9 A; Tj = 25 °C | 6 |
| source-drain voltage | VSD | | 0.8 | 1.2 | V | IS = 0.8 A; VGS = 0 V; Tj = 25 °C | 6 |
| total gate charge | QG(tot) | | 5.9 | 7.4 | nC | VDS = 30 V; ID = 2.1 A; VGS = 10 V; Tj = 25 °C | 6 |
## CAD (KiCad official)
- Symbol: `PMV120ENEAR`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `pmv120enear-etched.step` / `pmv120enear-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pmv120enear.step` / `pmv120enear.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590912532892758016) (16 pp, sha256 `8c5f7e8d6cf0f9f0`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pmv120enear-datasheet.pdf)