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PMS152-S08
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PADAUK Tech Microcontroller Units (MCUs/MPUs/SOCs), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PMS152-S08
PADAUK Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOP-8
PMS152-S08 from PADAUK Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive power supply, operating range 1.8V to 5.5V (absolute maximum 5.5V). |
| 2 | PA7/X1 | bidirectional | Bit 7 of port A, configurable as input or output with pull-up resistor, or crystal XIN; padier bit 7 must be 0 when used for crystal oscillator to avoid leakage, and the pin can wake the system from sleep. |
| 3 | PA6/X2 | bidirectional | Bit 6 of port A, configurable as input or output with pull-up resistor, or crystal XOUT; padier bit 6 must be 0 when used for crystal oscillator to avoid leakage, and the pin can wake the system from sleep. |
| 4 | PA5/PRSTB/PG2PWM | bidirectional | Bit 5 of port A as input or open-drain output only (sink 10mA), hardware reset input PRSTB, or PWMG2 output; use a 33 ohm series resistor for noise immunity in input mode. |
| 5 | PA3/CIN0-/TM2PWM/PG2PWM | bidirectional | Bit 3 of port A as digital input or two-state output with pull-up, comparator minus input 0, Timer2 PWM output or PWMG2 output; clear padier bit 3 when used as analog input. |
| 6 | PA4/CIN+/CIN1-/INT1A/PG1PWM | bidirectional | Bit 4 of port A as digital input or two-state output with pull-up, comparator plus input or minus input 1, external interrupt 1A (rising and falling edge), or PWMG1 output; clear padier bit 4 when used as analog input. |
| 7 | PA0/CO/PG0PWM/INT0 | bidirectional | Bit 0 of port A as digital input or two-state output with pull-up, comparator output, PWMG0 output, or external interrupt 0 (rising and falling edge); clearing padier bit 0 disables wake-up. |
| 8 | GND | power_in | Ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PADAUK Tech |
| Package | SOP-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 1.8 | 5 | 5.5 | V | * Subject to LVR tolerance | 16 |
| Low Voltage Reset Tolerance | LVR% | -5 | 5 | % | 16 | ||
| Power On Reset Voltage | VPOR | 1.8 | V | * Subject to LVR tolerance | 16 | ||
| Input low voltage for IO lines, PA5 | VIL | 0 | 0.1 | V | PA5 (max printed as 0.1 VDD) | 16 | |
| Input low voltage for IO lines, other IOs | VIL | 0 | 0.2 | V | Others IO (max printed as 0.2 VDD) | 16 | |
| Input high voltage for IO lines, PA5 | VIH | 0.8 | V | PA5 (min printed as 0.8 VDD, max VDD) | 16 | ||
| Input high voltage for IO lines, other IOs | VIH | 0.7 | V | Others IO (min printed as 0.7 VDD, max VDD) | 16 | ||
| Input voltage | VIN | -0.3 | 0.3 | V | max printed as VDD +0.3 | 16 | |
| Band-gap Reference Voltage | VBG | 1.145 | 1.2 | 1.255 | V | VDD =2.2V ~ 5.5V, -20°C <Ta<70°C* | 16 |
| IHRC frequency after calibration | fIHRC | 15.76 | 16 | 16.24 | MHz | 25°C, VDD =2.2V~5.5V | 16 |
| IHRC frequency after calibration | fIHRC | 15.2 | 16 | 16.8 | MHz | VDD =2.2V~5.5V, -20°C <Ta<70°C | 16 |
| IHRC frequency after calibration | fIHRC | 13.6 | 16 | 18.4 | MHz | VDD =1.8V~5.5V, -20°C <Ta<70°C | 16 |
| RAM data retention voltage | VDR | 1.5 | V | in stop mode | 17 | ||
| System boot-up period, normal boot-up | tSBP | 55 | ms | VDD =5V | 17 | ||
| System boot-up period, fast boot-up | tSBP | 820 | us | VDD =5V | 17 | ||
| External reset pulse width | tRST | 120 | us | @ VDD =5V | 17 | ||
| Comparator offset | CPos | 10 | 20 | mV | printed ±10 typ, ±20 max; design reference | 17 | |
| Comparator input common mode | CPcm | 0 | V | max printed as VDD -1.5 | 17 | ||
| Comparator response time | CPspt | 100 | 500 | ns | Both Rising and Falling | 17 | |
| Stable time to change comparator mode | CPmc | 2.5 | 7.5 | us | 17 | ||
| Comparator current consumption | CPcs | 20 | uA | VDD = 3.3V | 17 | ||
| Operating Current | IOP | 1 | mA | fSYS=IHRC/16=[email protected] | 16 | ||
| Operating Current | IOP | 15 | uA | fSYS=ILRC=[email protected] | 16 | ||
| Power Down Current | IPD | 1 | uA | fSYS= 0Hz, VDD =5.0V | 16 | ||
| Power Down Current | IPD | 0.6 | uA | fSYS= 0Hz, VDD =3.3V | 16 | ||
| Power Save Current | IPS | 5 | uA | VDD =5.0V; fSYS= ILRC | 16 | ||
| Pull-high Resistance | RPH | 100 | KΩ | VDD =5.0V | 16 | ||
| Pull-high Resistance | RPH | 200 | KΩ | VDD =3.0V | 16 | ||
| Interrupt pulse width | tINT | 30 | ns | VDD = 5.0V | 16 | ||
| Injected current on pin | IINJ(PIN) | 1 | mA | VDD +0.3≧VIN≧ -0.3 | 16 | ||
| IO sink current PA7, PA6, PA5, PA4, PA3, PA0, PB6, PB4, PB2, PB1, PB0 | IOL | 10 | mA | VDD=5.0V, VOL=0.5V | 16 | ||
| IO sink current PB7, PB5, PB3 | IOL | 30 | mA | VDD=5.0V, VOL=0.5V | 16 | ||
| IO drive current PA7, PA6, PA4, PA3, PA0, PB7, PB6, PB5, PB4, PB3, PB2, PB1, PB0 | IOH | -5 | mA | VDD=5.0V, VOH=4.5V | 16 | ||
| Supply Voltage (absolute maximum) | VDD | 1.8 | 5.5 | V | Maximum Rating: 5.5V | 17 | |
| Input Voltage (absolute maximum) | VIN | -0.3 | 0.3 | V | max printed as VDD + 0.3V | 17 | |
| Operating Temperature | -20 | 70 | °C | 17 | |||
| Storage Temperature | -50 | 125 | °C | 17 | |||
| Junction Temperature | 150 | °C | 17 |
CAD (KiCad official)
- Symbol:
PMS152-S08 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
pms152-s08-etched.step/pms152-s08-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pms152-s08.step/pms152-s08.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PADAUK Tech datasheet (87 pp, sha256
945f75dd13edb074, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PMS152-S08
**PADAUK Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · SOP-8
PMS152-S08 from PADAUK Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive power supply, operating range 1.8V to 5.5V (absolute maximum 5.5V). |
| 2 | PA7/X1 | bidirectional | Bit 7 of port A, configurable as input or output with pull-up resistor, or crystal XIN; padier bit 7 must be 0 when used for crystal oscillator to avoid leakage, and the pin can wake the system from sleep. |
| 3 | PA6/X2 | bidirectional | Bit 6 of port A, configurable as input or output with pull-up resistor, or crystal XOUT; padier bit 6 must be 0 when used for crystal oscillator to avoid leakage, and the pin can wake the system from sleep. |
| 4 | PA5/PRSTB/PG2PWM | bidirectional | Bit 5 of port A as input or open-drain output only (sink 10mA), hardware reset input PRSTB, or PWMG2 output; use a 33 ohm series resistor for noise immunity in input mode. |
| 5 | PA3/CIN0-/TM2PWM/PG2PWM | bidirectional | Bit 3 of port A as digital input or two-state output with pull-up, comparator minus input 0, Timer2 PWM output or PWMG2 output; clear padier bit 3 when used as analog input. |
| 6 | PA4/CIN+/CIN1-/INT1A/PG1PWM | bidirectional | Bit 4 of port A as digital input or two-state output with pull-up, comparator plus input or minus input 1, external interrupt 1A (rising and falling edge), or PWMG1 output; clear padier bit 4 when used as analog input. |
| 7 | PA0/CO/PG0PWM/INT0 | bidirectional | Bit 0 of port A as digital input or two-state output with pull-up, comparator output, PWMG0 output, or external interrupt 0 (rising and falling edge); clearing padier bit 0 disables wake-up. |
| 8 | GND | power_in | Ground. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PADAUK Tech |
| Package | SOP-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 1.8 | 5 | 5.5 | V | * Subject to LVR tolerance | 16 |
| Low Voltage Reset Tolerance | LVR% | -5 | | 5 | % | | 16 |
| Power On Reset Voltage | VPOR | | 1.8 | | V | * Subject to LVR tolerance | 16 |
| Input low voltage for IO lines, PA5 | VIL | 0 | | 0.1 | V | PA5 (max printed as 0.1 VDD) | 16 |
| Input low voltage for IO lines, other IOs | VIL | 0 | | 0.2 | V | Others IO (max printed as 0.2 VDD) | 16 |
| Input high voltage for IO lines, PA5 | VIH | 0.8 | | | V | PA5 (min printed as 0.8 VDD, max VDD) | 16 |
| Input high voltage for IO lines, other IOs | VIH | 0.7 | | | V | Others IO (min printed as 0.7 VDD, max VDD) | 16 |
| Input voltage | VIN | -0.3 | | 0.3 | V | max printed as VDD +0.3 | 16 |
| Band-gap Reference Voltage | VBG | 1.145 | 1.2 | 1.255 | V | VDD =2.2V ~ 5.5V, -20°C <Ta<70°C* | 16 |
| IHRC frequency after calibration | fIHRC | 15.76 | 16 | 16.24 | MHz | 25°C, VDD =2.2V~5.5V | 16 |
| IHRC frequency after calibration | fIHRC | 15.2 | 16 | 16.8 | MHz | VDD =2.2V~5.5V, -20°C <Ta<70°C | 16 |
| IHRC frequency after calibration | fIHRC | 13.6 | 16 | 18.4 | MHz | VDD =1.8V~5.5V, -20°C <Ta<70°C | 16 |
| RAM data retention voltage | VDR | 1.5 | | | V | in stop mode | 17 |
| System boot-up period, normal boot-up | tSBP | | 55 | | ms | VDD =5V | 17 |
| System boot-up period, fast boot-up | tSBP | | 820 | | us | VDD =5V | 17 |
| External reset pulse width | tRST | 120 | | | us | @ VDD =5V | 17 |
| Comparator offset | CPos | | 10 | 20 | mV | printed ±10 typ, ±20 max; design reference | 17 |
| Comparator input common mode | CPcm | 0 | | | V | max printed as VDD -1.5 | 17 |
| Comparator response time | CPspt | | 100 | 500 | ns | Both Rising and Falling | 17 |
| Stable time to change comparator mode | CPmc | | 2.5 | 7.5 | us | | 17 |
| Comparator current consumption | CPcs | | | 20 | uA | VDD = 3.3V | 17 |
| Operating Current | IOP | | 1 | | mA | fSYS=IHRC/[email protected] | 16 |
| Operating Current | IOP | | 15 | | uA | [email protected] | 16 |
| Power Down Current | IPD | | 1 | | uA | fSYS= 0Hz, VDD =5.0V | 16 |
| Power Down Current | IPD | | 0.6 | | uA | fSYS= 0Hz, VDD =3.3V | 16 |
| Power Save Current | IPS | | 5 | | uA | VDD =5.0V; fSYS= ILRC | 16 |
| Pull-high Resistance | RPH | | 100 | | KΩ | VDD =5.0V | 16 |
| Pull-high Resistance | RPH | | 200 | | KΩ | VDD =3.0V | 16 |
| Interrupt pulse width | tINT | 30 | | | ns | VDD = 5.0V | 16 |
| Injected current on pin | IINJ(PIN) | | | 1 | mA | VDD +0.3≧VIN≧ -0.3 | 16 |
| IO sink current PA7, PA6, PA5, PA4, PA3, PA0, PB6, PB4, PB2, PB1, PB0 | IOL | 10 | | | mA | VDD=5.0V, VOL=0.5V | 16 |
| IO sink current PB7, PB5, PB3 | IOL | 30 | | | mA | VDD=5.0V, VOL=0.5V | 16 |
| IO drive current PA7, PA6, PA4, PA3, PA0, PB7, PB6, PB5, PB4, PB3, PB2, PB1, PB0 | IOH | -5 | | | mA | VDD=5.0V, VOH=4.5V | 16 |
| Supply Voltage (absolute maximum) | VDD | 1.8 | | 5.5 | V | Maximum Rating: 5.5V | 17 |
| Input Voltage (absolute maximum) | VIN | -0.3 | | 0.3 | V | max printed as VDD + 0.3V | 17 |
| Operating Temperature | | -20 | | 70 | °C | | 17 |
| Storage Temperature | | -50 | | 125 | °C | | 17 |
| Junction Temperature | | | | 150 | °C | | 17 |
## CAD (KiCad official)
- Symbol: `PMS152-S08`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `pms152-s08-etched.step` / `pms152-s08-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pms152-s08.step` / `pms152-s08.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PADAUK Tech datasheet](docs/pms152-s08-datasheet.pdf) (87 pp, sha256 `945f75dd13edb074`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pms152-s08-datasheet.pdf)