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PMS132B-S14
Public Made by Adomby adom
PADAUK Tech Microcontroller Units (MCUs/MPUs/SOCs), SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPMS132B-S14
PADAUK Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOP-14
PMS132B-S14 from PADAUK Tech, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD/AVDD | power_in | Positive supply: VDD for the digital core and AVDD for the ADC, bonded together internally and the same external pin; operating range 2.2V to 5.5V. |
| 2 | PA7/X1 | bidirectional | Port A bit 7 programmable input/output with weak pull-up, or crystal oscillator X1 pin; clear padier bit 7 when used for the crystal to reduce leakage. |
| 3 | PA6/X2 | bidirectional | Port A bit 6 programmable input/output with weak pull-up, or crystal oscillator X2 pin; clear padier bit 6 when used for the crystal to reduce leakage. |
| 4 | PB7/AD7/CIN5-/TM3PWM/PG1PWM | bidirectional | Port B bit 7 I/O with weak pull-up, ADC input channel 7, comparator negative input 5, Timer3 PWM output or PWMG1 output; clear pbdier bit 7 when used as analog input. |
| 5 | PB3/AD3/PG2PWM | bidirectional | Port B bit 4 I/O with weak pull-up, ADC input channel 4, Timer2 PWM output or PWMG0 output; clear pbdier bit 4 when used as analog input. |
| 6 | PB5/AD5/INT0A/TM3PWM/PG0PWM | bidirectional | Port B bit 5 I/O with weak pull-up, ADC input channel 5, external interrupt 0A (rising and falling edge), Timer3 PWM output or PWMG0 output; clear pbdier bit 5 when used as analog input. |
| 7 | PA5/PRSTB/PG2PWM | bidirectional | Port A bit 5 input or open-drain output with no pull-up or pull-down resistor, hardware reset input PRSTB, or PWMG2 output; a 33 ohm series resistor is advised when used as input in noisy systems. |
| 8 | PB0/AD0/INT1 | bidirectional | Port B bit 0 I/O with weak pull-up, ADC input channel 0 or external interrupt 1 (rising and falling edge); clear pbdier bit 0 when used as analog input. |
| 9 | PB1/AD1/Vref | bidirectional | Port B bit 1 I/O with weak pull-up, ADC input channel 1 or ADC external high reference voltage; clear pbdier bit 1 when used as analog input. |
| 10 | PB3/AD3/PG2PWM | bidirectional | Port B bit 3 I/O with weak pull-up, ADC input channel 3 or PWMG2 output; clear pbdier bit 3 when used as analog input. |
| 11 | PA3/AD8/CIN0-/TW2PWM/PG2PWM | bidirectional | Port A bit 3 I/O with weak pull-up, ADC input channel 8, comparator negative input 0, Timer2 PWM output or PWMG2 output; clear padier bit 3 when used as analog input. |
| 12 | PA4/AD9/CIN+/CIN-/INT1A/PG1PWM | bidirectional | Port A bit 4 I/O with weak pull-up, ADC input channel 9, comparator positive or negative input 1, external interrupt 1A or PWMG1 output; clear padier bit 4 when used as analog input. |
| 13 | PA0/AD10/CO/INT0/PG0PWM | bidirectional | Port A bit 0 I/O with weak pull-up, ADC input channel 10, comparator output, PWMG0 output or external interrupt 0 (rising and falling edge). |
| 14 | GND/AGND | power_in | Ground: GND for the digital core and AGND for the ADC, bonded together internally and the same external pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PADAUK Tech |
| Package | SOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage | VDD | 2.2 | 5 | 5.5 | V | Limited by LVR tolerance | 17 |
| LVR accuracy | LVR% | -5 | 5 | % | 17 | ||
| Input low voltage PA5 | VIL | 0 | 0.1 | VDD | PA5 | 17 | |
| Input low voltage other IO | VIL | 0 | 0.2 | VDD | Other IO pins | 17 | |
| Input high voltage PA5 | VIH | 0.8 | 1 | VDD | PA5 | 17 | |
| Input high voltage other IO | VIH | 0.7 | 1 | VDD | Other IO pins | 17 | |
| Input voltage | VIN | -0.3 | V | Upper limit VDD +0.3 | 17 | ||
| Pin injection current | IINJ(PIN) | 1 | mA | VDD +0.3≧VIN≧ -0.3 | 17 | ||
| Band-gap reference voltage | VBG | 1.145 | 1.2 | 1.255 | V | VDD =2.2V ~ 5.5V, -20C<Ta<70C (design reference) | 17 |
| Calibrated IHRC frequency | fIHRC | 15.76 | 16 | 16.24 | MHz | 25C, VDD =2.2V~5.5V (design reference) | 17 |
| Calibrated IHRC frequency | fIHRC | 15.2 | 16 | 16.8 | MHz | VDD =2.2V~5.5V, 0C<Ta<70C (design reference) | 17 |
| Interrupt pulse width | tINT | 30 | ns | VDD = 5.0V | 17 | ||
| ADC operating voltage | VADC | 2.2 | V | Upper limit VDD | 18 | ||
| ADC input voltage | VAD | 0 | V | Upper limit VDD | 18 | ||
| ADC differential nonlinearity | AD DNL | -2 | 2 | LSB | Design reference | 18 | |
| ADC integral nonlinearity | AD INL | -4 | 4 | LSB | Design reference | 18 | |
| ADC reference high voltage 4V | VREFH | 3.9 | 4 | 4.1 | V | @ VDD =5V, 25C | 18 |
| ADC reference high voltage 3V | VREFH | 2.93 | 3 | 3.07 | V | @ VDD =5V, 25C | 18 |
| ADC reference high voltage 2V | VREFH | 1.95 | 2 | 2.05 | V | @ VDD =5V, 25C | 18 |
| Data memory retention voltage | VDR | 1.5 | V | Standby mode (design reference) | 18 | ||
| External reset pulse width | tRST | 120 | us | @ VDD =5V | 18 | ||
| Comparator offset voltage | CPos | 10 | 20 | mV | Design reference; printed ±10 / ±20 | 18 | |
| Comparator common-mode input | CPcm | 0 | V | Upper limit VDD-1.5 | 18 | ||
| Comparator response time | CPspt | 100 | 500 | ns | Rising and falling edges the same | 18 | |
| Comparator mode change settling time | CPmc | 2.5 | 7.5 | us | 18 | ||
| Supply voltage (absolute maximum) | 2.2 | 5.5 | V | 18 | |||
| Input voltage (absolute maximum) | -0.3 | V | Upper limit VDD + 0.3V | 18 | |||
| Operating temperature | -20 | 70 | °C | 18 | |||
| Junction temperature | 150 | °C | 18 | ||||
| Storage temperature | -50 | 125 | °C | 18 | |||
| Operating current | IOP | 1 | mA | fSYS=IHRC/16=[email protected] | 17 | ||
| Operating current | IOP | 15 | uA | fSYS=ILRC=[email protected] | 17 | ||
| Power-down current (stopsys) | IPD | 1 | uA | fSYS= 0Hz, VDD =5.0V | 17 | ||
| Power-down current (stopsys) | IPD | 0.6 | uA | fSYS= 0Hz, VDD =3.3V | 17 | ||
| Power-save current (stopexe) | IPS | 5 | uA | VDD =5.0V; fSYS= ILRC | 17 | ||
| Pull-up resistance | RPH | 100 | kΩ | VDD =5.0V | 17 | ||
| Pull-up resistance | RPH | 200 | kΩ | VDD =3.3V | 17 | ||
| Pull-up resistance | RPH | 450 | kΩ | VDD =2.2V | 17 | ||
| IO sink current PA5 | IOL | 23 | mA | VDD=5.0V, VOL=0.5V, PA5 | 17 | ||
| IO sink current PA0, PA3, PA4 | IOL | 20 | mA | VDD=5.0V, VOL=0.5V | 17 | ||
| ADC supply current | ADcs | 0.9 | mA | @5V | 18 | ||
| ADC supply current | ADcs | 0.8 | mA | @3V | 18 | ||
| ADC offset voltage | ADos | 2 | mV | @ VDD =3V | 18 | ||
| Comparator supply current | CPcs | 20 | uA | VDD = 3.3V | 18 |
CAD (KiCad official)
- Symbol:
PMS132B-S14 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
pms132b-s14-etched.step/pms132b-s14-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pms132b-s14.step/pms132b-s14.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PADAUK Tech datasheet (95 pp, sha256
3d00cf50c6d3a397, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).