component
PMN48XPA2X
Public Made by Adomby adom
Nexperia MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 23d ago |
| viewers | 23d ago |
| package.json | 23d ago |
| page.json | 23d ago |
| pmn48xpa2x-etched.glb | 23d ago |
| pmn48xpa2x-etched.step | 23d ago |
| pmn48xpa2x-hero.glb | 23d ago |
| pmn48xpa2x-hero.overlay.json | 23d ago |
| pmn48xpa2x.glb | 23d ago |
| pmn48xpa2x.kicad_mod | 23d ago |
| pmn48xpa2x.kicad_sym | 23d ago |
| pmn48xpa2x.lbr | 23d ago |
| pmn48xpa2x.step | 23d ago |
| README.md | 23d ago |
PMN48XPA2X
Nexperia · MOSFETs · TSOP-6
PMN48XPA2X from Nexperia, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain terminal of the P-channel MOSFET; drain-source voltage is limited to -20 V (Table 5). |
| 2 | D | passive | Drain terminal of the P-channel MOSFET; drain-source voltage is limited to -20 V (Table 5). |
| 3 | G | input | Gate terminal of the P-channel MOSFET; gate-source voltage is limited to -12 V to 12 V (Table 5). |
| 4 | S | passive | Source terminal of the P-channel MOSFET; source current is limited to -1.7 A (Table 5). |
| 5 | D | passive | Drain terminal of the P-channel MOSFET; drain-source voltage is limited to -20 V (Table 5). |
| 6 | D | passive | Drain terminal of the P-channel MOSFET; drain-source voltage is limited to -20 V (Table 5). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSOP-6 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| drain-source voltage | VDS | -20 | V | 3 | |||
| gate-source voltage | VGS | -12 | 12 | V | Tj = 25 °C | 3 | |
| drain current | ID | -4.4 | A | VGS = -4.5 V; Tamb = 25 °C | 3 | ||
| drain current | ID | -2.8 | A | VGS = -4.5 V; Tamb = 100 °C | 3 | ||
| peak drain current | IDM | -18 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 3 | ||
| total power dissipation | Ptot | 660 | mW | Tamb = 25 °C; FR4 PCB, standard footprint | 3 | ||
| total power dissipation | Ptot | 1.7 | W | FR4 PCB, mounting pad for drain 6 cm2 | 3 | ||
| total power dissipation | Ptot | 7.5 | W | Tsp = 25 °C | 3 | ||
| junction temperature | Tj | -55 | 175 | °C | 3 | ||
| ambient temperature | Tamb | -55 | 175 | °C | 3 | ||
| storage temperature | Tstg | -65 | 175 | °C | 3 | ||
| source current | IS | -1.7 | A | Tamb = 25 °C; FR4 PCB, mounting pad for drain 6 cm2 | 3 | ||
| electrostatic discharge voltage | VESD | 400 | V | HBM; measured between all pins | 3 | ||
| non-repetitive drain-source avalanche energy | EDS(AL)S | 10 | mJ | Tj(init) = 25 °C; ID = -1 A; DUT in avalanche (unclamped) | 3 | ||
| thermal resistance from junction to ambient | Rth(j-a) | 195 | 225 | K/W | in free air; FR4 PCB, single-sided copper, standard footprint | 5 | |
| thermal resistance from junction to ambient | Rth(j-a) | 78 | 90 | K/W | FR4 PCB, mounting pad for drain 6 cm2 | 5 | |
| thermal resistance from junction to solder point | Rth(j-sp) | 15 | 20 | K/W | 5 | ||
| drain-source breakdown voltage | V(BR)DSS | -20 | V | ID = -250 µA; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate-source threshold voltage | VGSth | -0.6 | -0.95 | -1.3 | V | ID = -250 µA; VDS = VGS; Tj = 25 °C | 6 |
| drain leakage current | IDSS | -1 | µA | VDS = -20 V; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | -100 | nA | VGS = -12 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | 100 | nA | VGS = 12 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| drain-source on-state resistance | RDSon | 37 | 49 | mΩ | VGS = -8 V; ID = -4.4 A; Tj = 25 °C | 6 | |
| drain-source on-state resistance | RDSon | 59 | 78 | mΩ | VGS = -8 V; ID = -4.4 A; Tj = 175 °C | 6 | |
| drain-source on-state resistance | RDSon | 43 | 55 | mΩ | VGS = -4.5 V; ID = -4.4 A; Tj = 25 °C | 6 | |
| drain-source on-state resistance | RDSon | 65 | 90 | mΩ | VGS = -2.5 V; ID = -2 A | 6 | |
| total gate charge | QG(tot) | 7 | 10 | nC | 6 | ||
| source-drain voltage | VSD | -0.8 | -1.2 | V | IS = -1.5 A; VGS = 0 V; Tj = 25 °C | 6 |
CAD (KiCad official)
- Symbol:
PMN48XPA2X - Footprint:
Package_SO:TSOP-6_1.65x3.05mm_P0.95mm - 3D model: TSOP-6 (KiCad packages3D, STEP)
- 3D model files:
pmn48xpa2x-etched.step/pmn48xpa2x-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pmn48xpa2x.step/pmn48xpa2x.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (15 pp, sha256
6e8c0a9d22fa420a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).