component
PMEG6020ER
Public Made by Adomby adom
Shikues Schottky Barrier Diodes (SBD), SOD-123FL. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPMEG6020ER
Shikues · Schottky Barrier Diodes (SBD) · SOD-123FL
PMEG6020ER from Shikues, in a SOD-123FL. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shikues |
| Package | SOD-123FL |
| Category | Diodes |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum Repetitive Peak Reverse Voltage | VRRM | 60 | V | 1 | |||
| Maximum RMS voltage | VRMS | 42 | V | 1 | |||
| Maximum DC Blocking Voltage | VDC | 60 | V | 1 | |||
| Maximum Average Forward Rectified Current | IF(AV) | 2 | A | 1 | |||
| Peak Forward Surge Current, 8.3ms single half sine-wave | IFSM | 50 | A | 8.3ms single half sine-wave superimposed on rated load (JEDEC method) | 1 | ||
| Peak Forward Surge Current, 1.0ms single half sine-wave | IFSM | 100 | A | 1.0ms single half sine-wave superimposed on rated load (JEDEC method) | 1 | ||
| I2t Rating for fusing | I2t | 10.3 | A | 3ms≤t≤8.3ms | 1 | ||
| Max Instantaneous Forward Voltage | VF | 0.7 | V | at 2 A | 1 | ||
| Maximum DC Reverse Current | IR | 0.5 | mA | At Rated DC Reverse Voltage, TA=25℃ | 1 | ||
| Maximum DC Reverse Current | IR | 5 | mA | At Rated DC Reverse Voltage, TA=100℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 125 | ℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Typical Junction Capacitance | CJ | 70 | pF | Measured at 1 MHz and applied reverse voltage of 4 V D.C | 1 | ||
| Typical Thermal Resistance, junction to ambient | RθJA | 105 | ℃/W | P.C.B. mounted with 2.0" * 2.0" (5 * 5 mm) copper pad areas | 1 | ||
| Typical Thermal Resistance, junction to case | RθJC | 25 | ℃/W | 1 | |||
| Typical Thermal Resistance, junction to lead | RθJL | 32 | ℃/W | 1 |
CAD (KiCad official)
- Symbol:
PMEG6020ER - Footprint:
Diode_SMD:D_SOD-123F - 3D model: SOD-123FL (KiCad packages3D, STEP)
- 3D model files:
pmeg6020er-etched.step/pmeg6020er-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pmeg6020er.step/pmeg6020er.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shikues datasheet (4 pp, sha256
bf390f1dc8d03bee, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins, primarycathode-band convention(convention), consensusoff(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).