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Initial commit: component/pmdt670upe

Ray ·d5e84670ea ·1mo ago
2 files changed +81
README.mdadded+47
@@ -0,0 +1,47 @@+# PMDT670UPE++**Nexperia** · MOSFETs · SOT-666++PMDT670UPE from Nexperia, in a SOT-666. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S1 | passive | Source of transistor TR1 (P-channel MOSFET #1). Typically tied to the higher potential rail in a P-channel high-side switch configuration. |+| 2 | G1 | input | Gate of transistor TR1. VGS threshold voltage typically -0.8 V (spec -0.5 V to -1.3 V); absolute maximum VGS ±8 V. |+| 3 | D2 | passive | Drain of transistor TR2 (P-channel MOSFET #2). Absolute maximum VDS = -20 V; continuous ID = -550 mA at Tamb = 25 °C. |+| 4 | S2 | passive | Source of transistor TR2 (P-channel MOSFET #2). |+| 5 | G2 | input | Gate of transistor TR2. Same drive characteristics as G1 (VGSth typ -0.8 V; VGS abs max ±8 V). |+| 6 | D1 | passive | Drain of transistor TR1 (P-channel MOSFET #1). Absolute maximum VDS = -20 V; continuous ID = -550 mA at Tamb = 25 °C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | SOT-666 |+| Category | Transistors/Thyristors |+| Pins | 6 |++## Ordering variants++Same part, different packaging or reel option.++- `PMDT670UPE`++## CAD (KiCad official)++- Symbol: `PMDT670UPE`+- Footprint: `Package_TO_SOT_SMD:SOT-666`+- 3D model: SOT-666 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914955852107776) (14 pp, sha256 `90d312c8a44e8094`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/pmdt670upe-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "pmdt670upe",+  "version": "0.1.0",+  "type": "component",+  "description": "Nexperia MOSFETs, SOT-666. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "pmdt670upe"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "pmdt670upe.kicad_sym",+    "pmdt670upe.kicad_mod",+    "pmdt670upe.glb",+    "pmdt670upe.step",+    "pmdt670upe.lbr",+    "docs/hero.png",+    "docs/pmdt670upe-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file