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pmdt670upe: factory component page (tier=lcsc)

Ray ·4dc0878ffd ·1mo ago ·parent 5081c90
1 file changed +110−8
page.json+110−8
@@ -1,13 +1,120 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "pmdt670upe",+  "title": "PMDT670UPE",+  "brief": "Nexperia MOSFETs, SOT-666. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia MOSFETs, SOT-666. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "transistors-thyristors",     "pmdt670upe"   ],+  "component": {+    "mpn": "PMDT670UPE",+    "manufacturer": "Nexperia",+    "package": "SOT-666",+    "pin_count": 6,+    "category": "Transistors/Thyristors",+    "subcategory": "MOSFETs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914955852107776",+    "parts": {+      "symbol": "pmdt670upe.kicad_sym",+      "footprint": "pmdt670upe.kicad_mod",+      "model_3d": "pmdt670upe.glb",+      "model_3d_step": "pmdt670upe.step",+      "lbr": "pmdt670upe.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "S1",+        "type": "passive",+        "description": "Source of transistor TR1 (P-channel MOSFET #1). Typically tied to the higher potential rail in a P-channel high-side switch configuration."+      },+      {+        "number": "2",+        "name": "G1",+        "type": "input",+        "description": "Gate of transistor TR1. VGS threshold voltage typically -0.8 V (spec -0.5 V to -1.3 V); absolute maximum VGS \u00b18 V."+      },+      {+        "number": "3",+        "name": "D2",+        "type": "passive",+        "description": "Drain of transistor TR2 (P-channel MOSFET #2). Absolute maximum VDS = -20 V; continuous ID = -550 mA at Tamb = 25 \u00b0C."+      },+      {+        "number": "4",+        "name": "S2",+        "type": "passive",+        "description": "Source of transistor TR2 (P-channel MOSFET #2)."+      },+      {+        "number": "5",+        "name": "G2",+        "type": "input",+        "description": "Gate of transistor TR2. Same drive characteristics as G1 (VGSth typ -0.8 V; VGS abs max \u00b18 V)."+      },+      {+        "number": "6",+        "name": "D1",+        "type": "passive",+        "description": "Drain of transistor TR1 (P-channel MOSFET #1). Absolute maximum VDS = -20 V; continuous ID = -550 mA at Tamb = 25 \u00b0C."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914955852107776",+        "pages": 14,+        "sha256": "90d312c8a44e8094",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "SOT-666",+      "Category": "Transistors/Thyristors",+      "Pins": "6"+    }+  },+  "variants": [+    {+      "mpn": "PMDT670UPE",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "pmdt670upe"+  ],+  "discovery_pitch": "PMDT670UPE (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +132,5 @@     "docs/pmdt670upe-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file