main
Ray Publish 0.1.0 60949a6 6d ago
{
  "slug": "pl84051",
  "version": "0.1.0",
  "type": "component",
  "description": "POWLICON DC-DC Converters, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power supply chip",
    "pl84051",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pl84051.kicad_sym",
    "pl84051.kicad_mod",
    "pl84051.glb",
    "pl84051.step",
    "pl84051.lbr",
    "docs/hero.png",
    "docs/pl84051-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pl84051-hero.glb",
    "pl84051-hero.overlay.json",
    "pl84051-etched.glb"
  ],
  "component": {
    "mpn": "PL84051",
    "manufacturer": "POWLICON",
    "package": "QFN-32-EP(5x5)",
    "pin_count": 33,
    "category": "Power Supply Chip",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941110756446208",
    "parts": {
      "symbol": "pl84051.kicad_sym",
      "footprint": "pl84051.kicad_mod",
      "model_3d": "pl84051-hero.glb",
      "model_3d_plain": "pl84051-etched.glb",
      "model_3d_step": "pl84051-etched.step",
      "model_3d_step_plain": "pl84051.step",
      "lbr": "pl84051.lbr"
    },
    "distributor_links": {
      "lcsc": "C2931199"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T20:51:06Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BST",
        "type": "passive",
        "description": "Boost pin for the high-side MOSFET driver; the only stated limit is BST to SW at -0.3 V to 7 V."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Input voltage pin (datasheet text reads 'Iput Voltag.'); VIN is rated to 40 V absolute maximum with 4.5 V to 32 V operating range."
      },
      {
        "number": "3",
        "name": "VIN",
        "type": "power_in",
        "description": "Input voltage pin (datasheet text reads 'Iput Voltag.'); VIN is rated to 40 V absolute maximum with 4.5 V to 32 V operating range."
      },
      {
        "number": "4",
        "name": "DVIN",
        "type": "power_in",
        "description": "Power node of VIN for the power stage, rated to the 40 V absolute maximum."
      },
      {
        "number": "5",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "6",
        "name": "EN",
        "type": "input",
        "description": "Logic high enables the converter (operation threshold 1.2 V typ., standby below 1.1 V); logic low disables everything except LDO2."
      },
      {
        "number": "7",
        "name": "LDO1",
        "type": "passive",
        "description": "Connect LDO1 to LDO2 (pin 13)."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_out",
        "description": "5.4 V power supply for the PL84051 control core (5.4 V at VIN = 15 V)."
      },
      {
        "number": "9",
        "name": "VADJ",
        "type": "input",
        "description": "Accepts a 0-2 V analog voltage or PWM signal to program the VREF reference; tying it to VDD forces VREF to a constant 2 V."
      },
      {
        "number": "10",
        "name": "IADJ",
        "type": "input",
        "description": "Accepts a 0-2 V analog voltage or PWM signal to program the IREF reference; tying it to VDD forces IREF to 2 V."
      },
      {
        "number": "11",
        "name": "IREF",
        "type": "passive",
        "description": "Reference voltage for the input and output current-limiting loop, programmed via IADJ; a large capacitor (470 nF recommended) is advised for soft-start."
      },
      {
        "number": "12",
        "name": "VREF",
        "type": "power_in",
        "description": "Voltage reference for the voltage control loop, 2 V in discharge mode and 1.8 V in charge mode when VADJ is tied to VDD."
      },
      {
        "number": "13",
        "name": "LDO2",
        "type": "power_out",
        "description": "Low quiescent current 5 V / 55 mA LDO powered directly from VIN, remaining active to power the MCU when EN is low."
      },
      {
        "number": "14",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; connect to PGND together at the thermal pad under the IC."
      },
      {
        "number": "15",
        "name": "FREQ",
        "type": "input",
        "description": "Sets switching frequency: connect to GND for 150 kHz, to VDD for 300 kHz, or to a VDD-GND resistor divider for 600 kHz or 1200 kHz."
      },
      {
        "number": "16",
        "name": "COMP",
        "type": "passive",
        "description": "Error amplifier output (compensation node) of the control loop."
      },
      {
        "number": "17",
        "name": "FB",
        "type": "input",
        "description": "VBUS voltage feedback input; a resistor divider from VBUS to GND programs the output, referenced to the internal 2 V VFB."
      },
      {
        "number": "18",
        "name": "CSN",
        "type": "input",
        "description": "Minus input of the output current sense; average current limit is 40 mV / RSNS."
      },
      {
        "number": "19",
        "name": "CSP",
        "type": "input",
        "description": "Positive input of the output current sense; shorting CSP to CSN disables the average current loop."
      },
      {
        "number": "20",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "21",
        "name": "SW",
        "type": "output",
        "description": "Switching point of the power stage, rated to the 40 V absolute maximum for SW."
      },
      {
        "number": "22",
        "name": "VBUS",
        "type": "power_in",
        "description": "Connect to the VBUS rail; VBUS UVLO rising threshold is 3.5 V with 300 mV hysteresis, and VBUS is rated to 40 V absolute maximum."
      },
      {
        "number": "23",
        "name": "VCC",
        "type": "power_out",
        "description": "6.6 V power supply for the high-side and low-side gate drivers (at VIN = 15 V)."
      },
      {
        "number": "24",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "25",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "26",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "27",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; connect PGND and AGND together at the thermal pad under the IC."
      },
      {
        "number": "28",
        "name": "SW",
        "type": "output",
        "description": "Switching point of the power stage, rated to the 40 V absolute maximum for SW."
      },
      {
        "number": "29",
        "name": "DVIN",
        "type": "power_in",
        "description": "Power node of VIN for the power stage, rated to the 40 V absolute maximum."
      },
      {
        "number": "30",
        "name": "DVIN",
        "type": "power_in",
        "description": "Power node of VIN for the power stage, rated to the 40 V absolute maximum."
      },
      {
        "number": "31",
        "name": "DVIN",
        "type": "power_in",
        "description": "Power node of VIN for the power stage, rated to the 40 V absolute maximum."
      },
      {
        "number": "32",
        "name": "DVIN",
        "type": "power_in",
        "description": "Power node of VIN for the power stage, rated to the 40 V absolute maximum."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet names a thermal pad under the IC and says PGND and AGND connect there, but gives no pa; The pin table text is 'Iput Voltag.' (typo). The description reflects only the function the table gi; The datasheet gives no electrical type for these pins. Types (passive, input, output) were inferred ",
          "exposed pad 33 added from the footprint"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0754,
        "at": "2026-10-20T20:48:25"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941110756446208",
        "pages": 13,
        "sha256": "b30438aee8ea91a4",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pl84051.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pl84051-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "571389b06df3b1861f4623b623c96d7f088f972107e683e8201df55f7c855dec",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}