# PL8332G

**POWLICON** · DC-DC Converters · ESOP-8

PL8332G from POWLICON, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Boot-strap pin: connect a 0.1µF or greater capacitor between SW and BST to power the high-side gate driver, and minimize the BST-SW loop to reduce EMI. |
| 2 | VIN | power_in | Power input supplied from a 6.5V to 36V source, bypassed to GND with a large capacitor plus at least one 0.1µF ceramic capacitor placed as close as possible to the VIN and GND pins. |
| 3 | SW | output | Power switching pin connected to the switching node of the inductor. |
| 4 | GND | power_in | Ground. |
| 5 | FB | input | Feedback input that senses the output voltage through a resistor divider to GND; it is a sensitive node to keep away from SW and BST, and a 47pF capacitor on FB is recommended for noise filtering. |
| 6 | COMP | passive | Connect the compensation network here to make the converter work stably. |
| 7 | EN | input | Digital enable input: drive high to turn the regulator on and low to turn it off; it is pulled to VIN internally by a large resistor so no external resistor is needed. |
| 8 | SS | passive | Soft-start programming pin: connect a capacitor here to set the soft-start time (internal 2.3µA charge current). |
| 9 | EPAD | power_in | Power ground and exposed pad; it must be connected to PCB ground for full-load operation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | POWLICON |
| Package | ESOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN to GND (absolute maximum) | VIN | -0.3 |  | 36 | V |  | 2 |
| VEN to GND (absolute maximum) | VEN | -0.3 |  | 6 | V |  | 2 |
| VSS to GND (absolute maximum) | VSS | -0.3 |  | 6 | V |  | 2 |
| VFB to GND (absolute maximum) | VFB | -0.3 |  | 6 | V |  | 2 |
| VCOMP to GND (absolute maximum) | VCOMP | -0.3 |  | 6 | V |  | 2 |
| VBST to VSW (absolute maximum) | VBST | -0.3 |  | 6 | V |  | 2 |
| VSW to GND (absolute maximum) | VSW | -1 |  |  | V |  | 2 |
| Storage Temperature Range | TST | -55 |  | 150 | °C |  | 3 |
| Junction Temperature | TJ |  |  | 160 | °C |  | 3 |
| Lead Temperature | TL |  |  | 260 | °C |  | 3 |
| Human Body Model ESD | VESD |  |  | 2 | KV | HBM | 3 |
| Machine Mode ESD | VESD |  |  | 400 | V | MM | 3 |
| VIN to GND (recommended operating) | VIN | 6.5 |  | 30 | V |  | 3 |
| EN (recommended operating) | EN | -0.3 |  | 5 | V |  | 3 |
| SS (recommended operating) | SS | -0.3 |  | 5 | V |  | 3 |
| FB (recommended operating) | FB | -0.3 |  | 5 | V |  | 3 |
| Output Voltage | VOUT | 0.5 |  |  | V |  | 3 |
| Output Current | IOUT | 0 |  | 3.1 | A |  | 3 |
| Operating junction temperature range | TJ | -40 |  | 125 | °C |  | 3 |
| High-Side Switch Leakage Current | Ileak_sw | 0 |  | 10 | µA | VEN = 0V, VSW = 0V | 4 |
| Junction to ambient thermal resistance (ESOP-8) | θJA |  | 56 |  | °C/W | Measured on approximately 1” square of 1 oz copper (Note 3) | 3 |
| Junction to case thermal resistance (ESOP-8) | θJC |  | 45 |  | °C/W |  | 3 |
| High-Side Switch On-Resistance | RDS(ON)_H |  | 79 |  | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| Low-Side Switch On-Resistance | RDS(ON)_L |  | 62 |  | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| Minimum input voltage for startup (UVLO up) | VUVLO_up |  | 6.5 |  | V |  | 4 |
| UVLO down threshold | VUVLO_down |  | 6 |  | V |  | 4 |
| UVLO hysteresis | VUVLO_hys |  | 0.5 |  | V |  | 4 |
| Operating quiescent current | IQ-NONSW |  | 1 |  | mA | VFB = 1.1V | 4 |
| Buck oscillator frequency | Foscb |  | 300 |  | kHz |  | 4 |
| Feedback Voltage | VFB |  | 0.9 |  | V | 4.5V ≤ VIN ≤ 36V | 4 |
| Feedback Over-voltage Threshold | VFB_OVP |  | 0.99 |  | V |  | 4 |
| Maximum Duty Cycle | Dmax |  | 94 |  | % |  | 4 |
| Minimum On Time | Ton |  | 100 |  | ns |  | 4 |
| Upper Switch Current Limit | Iocl_hs |  | 5.9 |  | A | Minimum Duty Cycle | 4 |
| Lower Switch Current Limit | Iocl_ls |  | 5.5 |  | A | From Drain to Source | 4 |
| Input Over voltage protection | Vinovp |  | 33 |  | V |  | 4 |
| Thermal Shutdown | Thsd |  | 155 |  | °C |  | 4 |
| Thermal Shutdown Hysteresis | Thsdhys |  | 15 |  | °C |  | 4 |
| EN High Voltage | VIH |  | 1.2 |  | V |  | 4 |
| EN Low Voltage | VIL |  | 1.1 |  | V |  | 4 |
| EN Input Current | IEN |  | 1.6 |  | uA |  | 4 |
| Soft-Start Charge Current | Ichg_ss |  | 2.3 |  | uA |  | 4 |
| Comp Source Current | Icmp_src |  | 5.2 |  | uA | VFB = 1.0 V | 4 |
| Comp Sink Current | Icmp_snk |  | 3.2 |  | uA | VFB = 0.8 V | 4 |

## CAD (KiCad official)

- Symbol: `PL8332G`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `pl8332g-etched.step` / `pl8332g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pl8332g.step` / `pl8332g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [POWLICON datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917987349319680) (14 pp, sha256 `079071d29eeea136`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pl8332g-datasheet.pdf)