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PL8310E
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POWLICON DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PL8310E
POWLICON · DC-DC Converters · SOT-23-6
PL8310E from POWLICON, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback input that senses the output voltage through an external resistor divider from the output to GND; it is a sensitive node and must be kept away from SW and BST. |
| 2 | GND | power_in | Ground pin of the device. |
| 3 | VIN | power_in | Power input supplying the IC, to be supplied from a 4.5 V to 36 V source and bypassed to GND with a large capacitor plus at least another 0.1 µF ceramic capacitor placed close to the VIN and GND pins. |
| 4 | SW | output | Power switching pin that connects to the switching node of the inductor. |
| 5 | BST | passive | Bootstrap pin; a 0.1 µF or greater capacitor connected between SW and BST powers the high-side gate driver. |
| 6 | CS | input | Current sense input; a 10 mΩ to 100 mΩ resistor between CS and GND programs the current limit, and the CS connection also selects the work mode (sense resistor to GND enables the CC loop, direct connection to GND sets the output with the FB divider). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | POWLICON |
| Package | SOT-23-6 |
| Category | Power Supply Chip |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-Side Switch Leakage Current | Ileak_sw | 0 | 10 | µA | VEN = 0V, VSW= 0V | 4 | |
| VIN to GND (recommended operating input voltage) | VIN | 6.5 | 30 | V | 3 | ||
| FB voltage (recommended) | FB | -0.3 | 3.3 | V | 3 | ||
| Output voltage (recommended) | VOUT | 0.5 | V | 3 | |||
| Output current (recommended) | IOUT | 0 | 1 | A | 3 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 3 | ||
| VIN to GND (absolute maximum) | VIN | -0.3 | 36 | V | 3 | ||
| VCS to GND (absolute maximum) | VCS | -0.3 | 6 | V | 3 | ||
| VFB to GND (absolute maximum) | VFB | -0.3 | 6 | V | 3 | ||
| VBST to VSW (absolute maximum) | VBST | -0.3 | 6 | V | 3 | ||
| VSW to GND (absolute maximum) | VSW | -1 | V | 3 | |||
| Storage temperature range | TST | -65 | 150 | °C | 3 | ||
| Junction temperature (absolute maximum) | TJ | 160 | °C | 3 | |||
| Lead temperature | TL | 260 | °C | 3 | |||
| ESD human body model | VESD HBM | 2 | 4 | kV | Human body model | 3 | |
| ESD charged device model | VESD CDM | 500 | V | Charger device model | 3 | ||
| High-Side Switch On-Resistance | RDS(ON)_H | 250 | mΩ | IOUT = 1A, VOUT = 3.3V | 4 | ||
| Low-Side Switch On-Resistance | RDS(ON)_L | 140 | mΩ | IOUT = 1A, VOUT = 3.3V | 4 | ||
| Minimum input voltage for startup (rising UVLO) | VUVLO_up | 4.4 | V | 4 | |||
| UVLO falling threshold (parameter name not printed) | VUVLO_down | 4.3 | V | 4 | |||
| UVLO hysteresis (parameter name not printed) | VUVLO_hys | 0.3 | 4 | ||||
| Operating quiescent current | IQ-NONSW | 1 | mA | VFB =0.9V | 4 | ||
| Buck oscillator frequency | Foscb | 150 | kHz | 4 | |||
| Feedback Voltage | VFB | 0.9 | V | 6.5V ≤ VIN ≤ 33V | 4 | ||
| Maximum Duty Cycle | Dmax | 98 | % | 4 | |||
| Minimum On Time | Ton | 100 | ns | 4 | |||
| Upper Switch Current Limit | Iocl_hs | 3.5 | A | Minimum Duty Cycle | 4 | ||
| Lower Switch Current Limit | Iocl_ls | 1.2 | A | From Drain to Source | 4 | ||
| Input over voltage protection | Vinovp | 33 | V | 4 | |||
| Thermal Shutdown | Thsd | 155 | °C | 4 | |||
| Thermal Shutdown Hysteresis | Thsdhys | 15 | °C | 4 | |||
| Junction to ambient thermal resistance | θJA | 180 | °C/W | 3 | |||
| Junction to case thermal resistance | θJC | 34 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
PL8310E - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
pl8310e-etched.step/pl8310e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pl8310e.step/pl8310e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: POWLICON datasheet (12 pp, sha256
b7b222c43b5ecb21, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PL8310E
**POWLICON** · DC-DC Converters · SOT-23-6
PL8310E from POWLICON, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback input that senses the output voltage through an external resistor divider from the output to GND; it is a sensitive node and must be kept away from SW and BST. |
| 2 | GND | power_in | Ground pin of the device. |
| 3 | VIN | power_in | Power input supplying the IC, to be supplied from a 4.5 V to 36 V source and bypassed to GND with a large capacitor plus at least another 0.1 µF ceramic capacitor placed close to the VIN and GND pins. |
| 4 | SW | output | Power switching pin that connects to the switching node of the inductor. |
| 5 | BST | passive | Bootstrap pin; a 0.1 µF or greater capacitor connected between SW and BST powers the high-side gate driver. |
| 6 | CS | input | Current sense input; a 10 mΩ to 100 mΩ resistor between CS and GND programs the current limit, and the CS connection also selects the work mode (sense resistor to GND enables the CC loop, direct connection to GND sets the output with the FB divider). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | POWLICON |
| Package | SOT-23-6 |
| Category | Power Supply Chip |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-Side Switch Leakage Current | Ileak_sw | 0 | | 10 | µA | VEN = 0V, VSW= 0V | 4 |
| VIN to GND (recommended operating input voltage) | VIN | 6.5 | | 30 | V | | 3 |
| FB voltage (recommended) | FB | -0.3 | | 3.3 | V | | 3 |
| Output voltage (recommended) | VOUT | 0.5 | | | V | | 3 |
| Output current (recommended) | IOUT | 0 | | 1 | A | | 3 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 3 |
| VIN to GND (absolute maximum) | VIN | -0.3 | | 36 | V | | 3 |
| VCS to GND (absolute maximum) | VCS | -0.3 | | 6 | V | | 3 |
| VFB to GND (absolute maximum) | VFB | -0.3 | | 6 | V | | 3 |
| VBST to VSW (absolute maximum) | VBST | -0.3 | | 6 | V | | 3 |
| VSW to GND (absolute maximum) | VSW | -1 | | | V | | 3 |
| Storage temperature range | TST | -65 | | 150 | °C | | 3 |
| Junction temperature (absolute maximum) | TJ | | | 160 | °C | | 3 |
| Lead temperature | TL | | | 260 | °C | | 3 |
| ESD human body model | VESD HBM | 2 | | 4 | kV | Human body model | 3 |
| ESD charged device model | VESD CDM | | | 500 | V | Charger device model | 3 |
| High-Side Switch On-Resistance | RDS(ON)_H | | 250 | | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| Low-Side Switch On-Resistance | RDS(ON)_L | | 140 | | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| Minimum input voltage for startup (rising UVLO) | VUVLO_up | | 4.4 | | V | | 4 |
| UVLO falling threshold (parameter name not printed) | VUVLO_down | | 4.3 | | V | | 4 |
| UVLO hysteresis (parameter name not printed) | VUVLO_hys | | 0.3 | | | | 4 |
| Operating quiescent current | IQ-NONSW | | 1 | | mA | VFB =0.9V | 4 |
| Buck oscillator frequency | Foscb | | 150 | | kHz | | 4 |
| Feedback Voltage | VFB | | 0.9 | | V | 6.5V ≤ VIN ≤ 33V | 4 |
| Maximum Duty Cycle | Dmax | | 98 | | % | | 4 |
| Minimum On Time | Ton | | 100 | | ns | | 4 |
| Upper Switch Current Limit | Iocl_hs | | 3.5 | | A | Minimum Duty Cycle | 4 |
| Lower Switch Current Limit | Iocl_ls | | 1.2 | | A | From Drain to Source | 4 |
| Input over voltage protection | Vinovp | | 33 | | V | | 4 |
| Thermal Shutdown | Thsd | | 155 | | °C | | 4 |
| Thermal Shutdown Hysteresis | Thsdhys | | 15 | | °C | | 4 |
| Junction to ambient thermal resistance | θJA | | 180 | | °C/W | | 3 |
| Junction to case thermal resistance | θJC | | 34 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `PL8310E`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `pl8310e-etched.step` / `pl8310e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pl8310e.step` / `pl8310e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [POWLICON datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894196325896192) (12 pp, sha256 `b7b222c43b5ecb21`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pl8310e-datasheet.pdf)